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author | Wilco Dijkstra <wdijkstr@arm.com> | 2020-07-15 16:50:02 +0100 |
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committer | Wilco Dijkstra <wdijkstr@arm.com> | 2020-07-15 16:50:02 +0100 |
commit | 34f0d01d5e43c7dedd002ab47f6266dfb5b79c22 (patch) | |
tree | ac69e41969ec830dd9073cf7d599bd77d0dee033 /sysdeps/aarch64/multiarch | |
parent | f896fc0f2bfc9f3f8df0563a7c99dcbf24bab655 (diff) | |
download | glibc-34f0d01d5e43c7dedd002ab47f6266dfb5b79c22.tar.gz glibc-34f0d01d5e43c7dedd002ab47f6266dfb5b79c22.tar.xz glibc-34f0d01d5e43c7dedd002ab47f6266dfb5b79c22.zip |
AArch64: Align ENTRY to a cacheline
Given almost all uses of ENTRY are for string/memory functions, align ENTRY to a cacheline to simplify things. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
Diffstat (limited to 'sysdeps/aarch64/multiarch')
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