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| author | Feng Xue <fxue@os.amperecomputing.com> | 2018-07-30 02:21:42 -0400 |
|---|---|---|
| committer | Feng Xue <fxue@os.amperecomputing.com> | 2019-02-01 07:59:18 -0500 |
| commit | c7d3890ff51bceb38fac0947ce1f2bb0c34f6b15 (patch) | |
| tree | 2888ed321d26b3c0df7347cf25e0772a41fadf12 /sysdeps/aarch64/memchr.S | |
| parent | 07c3d1ec03ee3633918afb59213cd1bac2ab276e (diff) | |
| download | glibc-c7d3890ff51bceb38fac0947ce1f2bb0c34f6b15.tar.gz glibc-c7d3890ff51bceb38fac0947ce1f2bb0c34f6b15.tar.xz glibc-c7d3890ff51bceb38fac0947ce1f2bb0c34f6b15.zip | |
aarch64: Optimized memset specific to AmpereComputing emag
This version uses general register based memory store instead of
vector register based, for the former is faster than the latter
in emag.
The fact that DC ZVA size in emag is 64-byte, is used by IFUNC
dispatch to select this memset, so that cost of runtime-check on
DC ZVA size can be saved.
* sysdeps/aarch64/multiarch/Makefile (sysdep_routines):
Add memset_emag.
* sysdeps/aarch64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add __memset_emag to memset ifunc.
* sysdeps/aarch64/multiarch/memset.c (libc_ifunc):
Add IS_EMAG check for ifunc dispatch.
* sysdeps/aarch64/multiarch/memset_base64.S: New file.
* sysdeps/aarch64/multiarch/memset_emag.S: New file.
Diffstat (limited to 'sysdeps/aarch64/memchr.S')
0 files changed, 0 insertions, 0 deletions