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authorJoe Ramsay <Joe.Ramsay@arm.com>2023-06-28 12:19:39 +0100
committerSzabolcs Nagy <szabolcs.nagy@arm.com>2023-06-30 09:04:26 +0100
commit4a9392ffc27ad280f84779eea3ba01f2c134d1d8 (patch)
tree8716efd89aadc70338eeff9622cfcbdd7ff7911e /sysdeps/aarch64/hp-timing.h
parent78c01a5cbeb6717ffa2d4d66bb90ac5c39bd81a9 (diff)
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aarch64: Add vector implementations of exp routines
Optimised implementations for single and double precision, Advanced
SIMD and SVE, copied from Arm Optimized Routines.

As previously, data tables are used via a barrier to prevent
overly aggressive constant inlining. Special-case handlers are
marked NOINLINE to avoid incurring the penalty of switching call
standards unnecessarily.

Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/aarch64/hp-timing.h')
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