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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2024-04-30 13:49:58 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2024-05-16 14:34:43 +0100 |
| commit | 157f89fa3d616729c8d7797168a9b3eaaa6ebf6e (patch) | |
| tree | c09ad8123f04804743385cdab5b6f5ade5dfbb95 /sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | |
| parent | a743fd95bb895001584b018033418b84b451e67e (diff) | |
| download | glibc-157f89fa3d616729c8d7797168a9b3eaaa6ebf6e.tar.gz glibc-157f89fa3d616729c8d7797168a9b3eaaa6ebf6e.tar.xz glibc-157f89fa3d616729c8d7797168a9b3eaaa6ebf6e.zip | |
aarch64/fpu: Add vector variants of hypot
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c index 08e33115b9..dab0f1cfcb 100644 --- a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c @@ -38,6 +38,7 @@ VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf) VPCS_VECTOR_WRAPPER (exp10f_advsimd, _ZGVnN4v_exp10f) VPCS_VECTOR_WRAPPER (exp2f_advsimd, _ZGVnN4v_exp2f) VPCS_VECTOR_WRAPPER (expm1f_advsimd, _ZGVnN4v_expm1f) +VPCS_VECTOR_WRAPPER_ff (hypotf_advsimd, _ZGVnN4vv_hypotf) VPCS_VECTOR_WRAPPER (logf_advsimd, _ZGVnN4v_logf) VPCS_VECTOR_WRAPPER (log10f_advsimd, _ZGVnN4v_log10f) VPCS_VECTOR_WRAPPER (log1pf_advsimd, _ZGVnN4v_log1pf) |