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| author | Andrea Corallo <andrea.corallo@arm.com> | 2020-06-05 17:22:26 +0200 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2020-06-09 09:21:11 +0100 |
| commit | a365ac45b7b51dbd9dc65629203cc2a9603420bb (patch) | |
| tree | 97f095e4a8c12b00eaa7507bf3501c26a8f24464 /po/lt.po | |
| parent | 49beaaec1bd333c543f7150576a0f9f6a28a4879 (diff) | |
| download | glibc-a365ac45b7b51dbd9dc65629203cc2a9603420bb.tar.gz glibc-a365ac45b7b51dbd9dc65629203cc2a9603420bb.tar.xz glibc-a365ac45b7b51dbd9dc65629203cc2a9603420bb.zip | |
aarch64: MTE compatible strlen
Introduce an Arm MTE compatible strlen implementation. The existing implementation assumes that any access to the pages in which the string resides is safe. This assumption is not true when MTE is enabled. This patch updates the algorithm to ensure that accesses remain within the bounds of an MTE tag (16-byte chunks) and improves overall performance on modern cores. On cores with less efficient Advanced SIMD implementation such as Cortex-A53 it can be slower. Benchmarked on Cortex-A72, Cortex-A53, Neoverse N1. Co-authored-by: Wilco Dijkstra <wilco.dijkstra@arm.com>
Diffstat (limited to 'po/lt.po')
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