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author | Ling Ma <ling.ml@alibaba-inc.com> | 2014-06-19 13:00:56 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2014-06-19 15:14:08 -0700 |
commit | 5c74e47cd628a6fcd2e4eba021301e275f8a95a3 (patch) | |
tree | b85959ae1a65bc526d683807213027115886d96d /nis/nis_defaults.c | |
parent | 4d43ef1e7434d7d419afbcd754931cb0c794763c (diff) | |
download | glibc-5c74e47cd628a6fcd2e4eba021301e275f8a95a3.tar.gz glibc-5c74e47cd628a6fcd2e4eba021301e275f8a95a3.tar.xz glibc-5c74e47cd628a6fcd2e4eba021301e275f8a95a3.zip |
Add x86_64 memset optimized for AVX2
In this patch we take advantage of HSW memory bandwidth, manage to reduce miss branch prediction by avoiding using branch instructions and force destination to be aligned with avx & avx2 instruction. The CPU2006 403.gcc benchmark indicates this patch improves performance from 26% to 59%. * sysdeps/x86_64/multiarch/Makefile: Add memset-avx2. * sysdeps/x86_64/multiarch/memset-avx2.S: New file. * sysdeps/x86_64/multiarch/memset.S: Likewise. * sysdeps/x86_64/multiarch/memset_chk.S: Likewise. * sysdeps/x86_64/multiarch/rtld-memset.S: Likewise.
Diffstat (limited to 'nis/nis_defaults.c')
0 files changed, 0 insertions, 0 deletions