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| author | Bruno Haible <bruno@clisp.org> | 2023-11-01 02:10:11 +0100 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2023-12-19 15:12:38 -0300 |
| commit | e55599e0286655dd5f1f5b48005a17be37cc7f2c (patch) | |
| tree | 7e128550b7fd951aa7b4fc13ea3e7585347e492d /manual | |
| parent | 787282dede7f134fdb22155cee0c35172e3e28f3 (diff) | |
| download | glibc-e55599e0286655dd5f1f5b48005a17be37cc7f2c.tar.gz glibc-e55599e0286655dd5f1f5b48005a17be37cc7f2c.tar.xz glibc-e55599e0286655dd5f1f5b48005a17be37cc7f2c.zip | |
manual: Clarify undefined behavior of feenableexcept (BZ 31019)
Explain undefined behavior of feenableexcept in a special case. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
Diffstat (limited to 'manual')
| -rw-r--r-- | manual/arith.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/manual/arith.texi b/manual/arith.texi index fa7110e992..be24c20493 100644 --- a/manual/arith.texi +++ b/manual/arith.texi @@ -1176,6 +1176,12 @@ enabled, the status of the other exceptions is not changed. The function returns the previous enabled exceptions in case the operation was successful, @code{-1} otherwise. + +Note: Enabling traps for an exception for which the exception flag is +currently already set (@pxref{Status bit operations}) has unspecified +consequences: it may or may not trigger a trap immediately. +@c It triggers a trap immediately on powerpc*, at the next floating- +@c instruction on i386, and not at all on the other CPUs. @end deftypefun @deftypefun int fedisableexcept (int @var{excepts}) |