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author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-09 09:58:31 -0700 |
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committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-06-09 12:51:09 -0700 |
commit | fe1915d4f6dd5db92ce9d0be47c9d4e04f95946c (patch) | |
tree | 88dec435d86d3b16b62ab50ece5aa8733eae7476 /elf/tst-tls12.c | |
parent | 65897e991685c87f4575694197d3ce24f7fc9c5a (diff) | |
download | glibc-fe1915d4f6dd5db92ce9d0be47c9d4e04f95946c.tar.gz glibc-fe1915d4f6dd5db92ce9d0be47c9d4e04f95946c.tar.xz glibc-fe1915d4f6dd5db92ce9d0be47c9d4e04f95946c.zip |
x86: Improve svml_s_atanhf4_core_sse4.S
Improvements are: 1. Reduce code size (-62 bytes). 2. Remove redundant move instructions. 3. Slightly improve instruction selection/scheduling where possible. 4. Prefer registers which get short instruction encoding. 5. Reduce rodata usage (-16 bytes). The throughput improvement is not significant as the port 0 bottleneck is unavoidable. Function, New Time, Old Time, New / Old _ZGVbN4v_atanhf, 8.821, 8.903, 0.991
Diffstat (limited to 'elf/tst-tls12.c')
0 files changed, 0 insertions, 0 deletions