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| author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-10-29 15:19:57 -0500 |
|---|---|---|
| committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-11-08 19:19:35 -0800 |
| commit | ca7d181b62f703ae56b7be1e27428184560f68b4 (patch) | |
| tree | 7ba13edf767a4cb6e452cd093b51e99170cfa7cb /benchtests/atanh-inputs | |
| parent | 2e274cd8c1ebd0bd0c43a7f2e5433685740938ca (diff) | |
| download | glibc-ca7d181b62f703ae56b7be1e27428184560f68b4.tar.gz glibc-ca7d181b62f703ae56b7be1e27428184560f68b4.tar.xz glibc-ca7d181b62f703ae56b7be1e27428184560f68b4.zip | |
string: Add len=0 to {w}memcmp{eq} tests and benchtests
len=0 is valid and fairly common so should be tested. Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
Diffstat (limited to 'benchtests/atanh-inputs')
0 files changed, 0 insertions, 0 deletions