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| author | H.J. Lu <hjl.tools@gmail.com> | 2017-08-23 06:16:12 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2017-08-23 06:26:44 -0700 |
| commit | b9eaca8fa0a9628a992e0f1478aaadde576804e1 (patch) | |
| tree | 10d8dcd9696ac057b485e94e7a003d3856de71dc /ChangeLog | |
| parent | 5a706f649de3952271930a8340db4ca8aa50f485 (diff) | |
| download | glibc-b9eaca8fa0a9628a992e0f1478aaadde576804e1.tar.gz glibc-b9eaca8fa0a9628a992e0f1478aaadde576804e1.tar.xz glibc-b9eaca8fa0a9628a992e0f1478aaadde576804e1.zip | |
x86_64: Replace AVX512F .byte sequences with instructions
Since binutils 2.25 or later is required to build glibc, we can replace AVX512F .byte sequences with AVX512F instructions. Tested on x86-64 and x32. There are no code differences in libmvec.so and libmvec.a. * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Replace AVX512F .byte sequences with AVX512F instructions. * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Likewise. * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise. * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 43c8880a76..a58de05af6 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,15 @@ +2017-08-23 H.J. Lu <hongjiu.lu@intel.com> + + * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: Replace AVX512F + .byte sequences with AVX512F instructions. + * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Likewise. + * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S: Likewise. + * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Likewise. + * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: + Likewise. + * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: + Likewise. + 2017-08-22 Szabolcs Nagy <szabolcs.nagy@arm.com> Steve Ellcey <sellcey@cavium.com> |