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authorJoseph Myers <joseph@codesourcery.com>2014-08-12 20:31:54 +0000
committerJoseph Myers <joseph@codesourcery.com>2014-08-12 20:31:54 +0000
commit898c62f488e9c403bbb1a96d06c7a257b047fcbc (patch)
treedc8e54b157d3adb06b993cd247844d3b22e7b1d1 /ChangeLog
parent9a8a57209aeab41109bec84f2eeee75a7c1fdc60 (diff)
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Fix powerpc-nofpu __fe_enabled_env and __fe_nonieee_env (bug 17261).
On powerpc, floating-point environment macros are defined as pointers
to constants in the library that contain the bit-patterns of the
desired environment, instead of being magic constants cast to pointer
type.

For soft-float, the bit-patterns used for fenv_t are not laid out the
same as for hard-float.  (e500 has a third layout used; that's not an
ABI issue because these values are only meaningful within a single
process, all of whose glibc libraries must come from the same build of
glibc.)  While the __fe_dfl_env value for soft-float was appropriate
for the soft-float fenv_t representation, the other two constants had
the same bit-patterns as for hard-float.  Those bit patterns had the
effect of having exceptions already raised, causing
math/test-fenv-return to fail; this patch fixes the patterns used.
(__fe_nonieee_env also had exceptions unmasked, though they should be
masked to match hard-float semantics.  Since there is no separate
non-IEEE mode for soft-float, it's most appropriate for
__fe_nonieee_env to be the same as __fe_dfl_env; this patch makes it
an alias.)

Tested for powerpc-nofpu.

	[BZ #17261]
	* sysdeps/powerpc/nofpu/fenv_const.c (__fe_enabled_env): Change
	value to 0.
	(__fe_nonieee_env): Define as an alias for __fe_dfl_env.
Diffstat (limited to 'ChangeLog')
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diff --git a/ChangeLog b/ChangeLog
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--- a/ChangeLog
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@@ -1,3 +1,10 @@
+2014-08-12  Joseph Myers  <joseph@codesourcery.com>
+
+	[BZ #17261]
+	* sysdeps/powerpc/nofpu/fenv_const.c (__fe_enabled_env): Change
+	value to 0.
+	(__fe_nonieee_env): Define as an alias for __fe_dfl_env.
+
 2014-08-12  Roland McGrath  <roland@hack.frob.com>
 
 	* NEWS: Mention x86-64 ld.so use of Intel MPX instructions.