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| author | H.J. Lu <hjl.tools@gmail.com> | 2017-06-05 07:41:14 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2017-06-05 07:41:26 -0700 |
| commit | 7395928b957ebb35afb696c3278d14122aa97b51 (patch) | |
| tree | ca45794e0ad69d0e4d03bd94d36d6afcb54edd6b /ChangeLog | |
| parent | d8a7d10324d9765fa62f42c1d94c5bf36b60d558 (diff) | |
| download | glibc-7395928b957ebb35afb696c3278d14122aa97b51.tar.gz glibc-7395928b957ebb35afb696c3278d14122aa97b51.tar.xz glibc-7395928b957ebb35afb696c3278d14122aa97b51.zip | |
x86_64: Remove redundant REX bytes from memrchr.S
By x86-64 specification, 32-bit destination registers are zero-extended to 64 bits. There is no need to use 64-bit registers when only the lower 32 bits are non-zero. Also 2 instructions in: mov %rdi, %rcx and $15, %rcx jz L(length_less16_offset0) mov %rdi, %rcx <<< redundant and $15, %rcx <<< redundant are redundant. * sysdeps/x86_64/memrchr.S (__memrchr): Use 32-bit registers for the lower 32 bits. Remove redundant instructions.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 1cbcf564e0..1549eb6422 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,10 @@ 2017-06-05 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/memrchr.S (__memrchr): Use 32-bit registers for + the lower 32 bits. Remove redundant instructions. + +2017-06-05 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/unix/sysv/linux/x86_64/sysdep.h (LO_HI_LONG): Pass 0 as the high part of offset. * sysdeps/unix/sysv/linux/x86_64/x32/sysdep.h (LO_HI_LONG): New. |