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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2015-08-05 14:57:37 +0100 |
|---|---|---|
| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2015-08-05 16:24:01 +0100 |
| commit | 3136eb7abd3e45a8622c0272181816c1a92e1f65 (patch) | |
| tree | 5aeae1b79760c432d5983c725b656f5c0c8aee50 /ChangeLog | |
| parent | 782723d6d8c7b599c4fdbbd359a7bc57b25044ad (diff) | |
| download | glibc-3136eb7abd3e45a8622c0272181816c1a92e1f65.tar.gz glibc-3136eb7abd3e45a8622c0272181816c1a92e1f65.tar.xz glibc-3136eb7abd3e45a8622c0272181816c1a92e1f65.zip | |
Improve fesetenv performance by avoiding unnecessary FPSR/FPCR reads/writes.
It uses the same logic as the ARM version. The common case removes 1 FPSR and 1 FPCR read. For FE_DFL_ENV and FE_NOMASK_ENV a FPCR read is avoided in case the FPCR does not change.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index adeba9268d..ecf9d7b1ce 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2015-08-05 Wilco Dijkstra <wdijkstr@arm.com> + + * sysdeps/aarch64/fpu/fesetenv.c (fesetenv): + Optimize to reduce FPCR/FPSR accesses. + 2015-08-05 H.J. Lu <hongjiu.lu@intel.com> * locale/loadarchive.c (_nl_archive_subfreeres): Also check |