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authorH.J. Lu <hjl.tools@gmail.com>2023-04-05 09:21:40 -0700
committerH.J. Lu <hjl.tools@gmail.com>2023-04-05 14:46:10 -0700
commitb39741b45f3de7090a7f7fdd8bc487382d53b848 (patch)
tree71c9b9db7a740e901d32e7a41c4a603b23e189ee
parent96037c697d5a5b1bc19caae74dddf45e041b0ffd (diff)
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<sys/platform/x86.h>: Add MSRLIST support
Add MSRLIST support to <sys/platform/x86.h>.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
-rw-r--r--manual/platform.texi4
-rw-r--r--sysdeps/x86/bits/platform/x86.h1
-rw-r--r--sysdeps/x86/tst-get-cpu-features.c1
3 files changed, 6 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi
index af75e5c413..bfccd024a5 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -465,6 +465,10 @@ the indirect branch predictor barrier (IBPB).
 @code{MSR} -- Model Specific Registers RDMSR and WRMSR instructions.
 
 @item
+@code{MSRLIST} -- RDMSRLIST/WRMSRLIST instructions and IA32_BARRIER
+MSR.
+
+@item
 @code{MTRR} -- Memory Type Range Registers.
 
 @item
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index abc0116607..57973e9a6c 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -302,6 +302,7 @@ enum
   x86_cpu_HRESET		= x86_cpu_index_7_ecx_1_eax + 22,
   x86_cpu_AVX_IFMA		= x86_cpu_index_7_ecx_1_eax + 23,
   x86_cpu_LAM			= x86_cpu_index_7_ecx_1_eax + 26,
+  x86_cpu_MSRLIST		= x86_cpu_index_7_ecx_1_eax + 27,
 
   x86_cpu_index_19_ebx
     = (CPUID_INDEX_19 * 8 * 4 * sizeof (unsigned int)
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 3a2d4671ec..0c948c2b04 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -214,6 +214,7 @@ do_test (void)
   CHECK_CPU_FEATURE_PRESENT (HRESET);
   CHECK_CPU_FEATURE_PRESENT (AVX_IFMA);
   CHECK_CPU_FEATURE_PRESENT (LAM);
+  CHECK_CPU_FEATURE_PRESENT (MSRLIST);
   CHECK_CPU_FEATURE_PRESENT (AESKLE);
   CHECK_CPU_FEATURE_PRESENT (WIDE_KL);
   CHECK_CPU_FEATURE_PRESENT (PTWRITE);