diff options
| author | Sebastan Andrzej Siewior <bigeasy@linutronix.de> | 2012-11-01 16:48:47 -0500 |
|---|---|---|
| committer | Ryan S. Arnold <rsa@linux.vnet.ibm.com> | 2012-11-01 16:48:47 -0500 |
| commit | a2421a6853085c723d0d611e3bd398bc41b992f6 (patch) | |
| tree | 4f4a593eb979e6eb287f0af1546143490c5bf75e | |
| parent | 7402596be74d948048ff6bc11c9978b51e2de69e (diff) | |
| download | glibc-a2421a6853085c723d0d611e3bd398bc41b992f6.tar.gz glibc-a2421a6853085c723d0d611e3bd398bc41b992f6.tar.xz glibc-a2421a6853085c723d0d611e3bd398bc41b992f6.zip | |
Put __NO_FPRS__ around floating point opcodes in powerpc32/dl-trampoline.S.
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/dl-trampoline.S | 4 |
2 files changed, 9 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index c184e5e3dc..4d0407d457 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2012-11-01 Sebastan Andrzej Siewior <bigeasy@linutronix.de> + + * sysdeps/powerpc/powerpc32/dl-trampoline.S: Put __NO_FPRS__ around + floating point opcodes. + 2012-11-01 Thomas Schwinge <thomas@codesourcery.com> * sysdeps/mach/hurd/Makefile (link-libc-static-tests): New diff --git a/sysdeps/powerpc/powerpc32/dl-trampoline.S b/sysdeps/powerpc/powerpc32/dl-trampoline.S index 381c2e5f32..1b5257b052 100644 --- a/sysdeps/powerpc/powerpc32/dl-trampoline.S +++ b/sysdeps/powerpc/powerpc32/dl-trampoline.S @@ -136,6 +136,7 @@ _dl_prof_resolve: stw r9,40(r1) stw r10,44(r1) stw r0,8(r1) +#ifndef __NO_FPRS__ # Save the floating point registers stfd fp1,48(r1) stfd fp2,56(r1) @@ -145,6 +146,7 @@ _dl_prof_resolve: stfd fp6,88(r1) stfd fp7,96(r1) stfd fp8,104(r1) +#endif # XXX TODO: store vmx registers # Load the extra parameters. addi r6,r1,16 @@ -168,6 +170,7 @@ _dl_prof_resolve: lwz r4,20(r1) lwz r3,16(r1) lwz r0,12(r1) +#ifndef __NO_FPRS__ # Load the floating point registers. lfd fp1,48(r1) lfd fp2,56(r1) @@ -177,6 +180,7 @@ _dl_prof_resolve: lfd fp6,88(r1) lfd fp7,96(r1) lfd fp8,104(r1) +#endif # ...unwind the stack frame, and jump to the PLT entry we updated. addi r1,r1,320 bctr |