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| author | H.J. Lu <hjl.tools@gmail.com> | 2012-03-19 17:29:26 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2012-03-19 17:29:26 -0700 |
| commit | 95443d88afbc732f39fa1d9d36b5adcea8606b54 (patch) | |
| tree | dae4346bfd71b4bb4669395599c3a235fbba8213 | |
| parent | 24d8f4b7dc85b8f4c8907527ec92c9d2e5fdce7c (diff) | |
| download | glibc-95443d88afbc732f39fa1d9d36b5adcea8606b54.tar.gz glibc-95443d88afbc732f39fa1d9d36b5adcea8606b54.tar.xz glibc-95443d88afbc732f39fa1d9d36b5adcea8606b54.zip | |
Use atomic64_t with 64bit atomic macros
| -rw-r--r-- | ChangeLog | 11 | ||||
| -rw-r--r-- | sysdeps/x86_64/bits/atomic.h | 14 |
2 files changed, 18 insertions, 7 deletions
diff --git a/ChangeLog b/ChangeLog index bb13f6d36f..ae49456f7e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,16 @@ 2012-03-19 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/bits/atomic.h + (__arch_c_compare_and_exchange_val_64_acq): Use atomic64_t on + 64bit integer. + (atomic_exchange_acq): Likewise. + (__arch_exchange_and_add_body): Likewise. + (__arch_add_body): Likewise. + (atomic_add_negative): Likewise. + (atomic_add_zero): Likewise. + +2012-03-19 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/bits/mathdef.h: Don't include <bits/wordsize.h>. (fenv_t): Check __x86_64__ instead of __WORDSIZE. diff --git a/sysdeps/x86_64/bits/atomic.h b/sysdeps/x86_64/bits/atomic.h index 4b8d2ab095..100943fa1e 100644 --- a/sysdeps/x86_64/bits/atomic.h +++ b/sysdeps/x86_64/bits/atomic.h @@ -101,8 +101,8 @@ typedef uintmax_t uatomic_max_t; "lock\n" \ "0:\tcmpxchgq %q2, %1" \ : "=a" (ret), "=m" (*mem) \ - : "q" ((long int) (newval)), "m" (*mem), \ - "0" ((long int)oldval), \ + : "q" ((atomic64_t) (newval)), "m" (*mem), \ + "0" ((atomic64_t) (oldval)), \ "i" (offsetof (tcbhead_t, multiple_threads))); \ ret; }) @@ -125,7 +125,7 @@ typedef uintmax_t uatomic_max_t; else \ __asm __volatile ("xchgq %q0, %1" \ : "=r" (result), "=m" (*mem) \ - : "0" ((long) (newvalue)), "m" (*mem)); \ + : "0" ((atomic64_t) (newvalue)), "m" (*mem)); \ result; }) @@ -149,7 +149,7 @@ typedef uintmax_t uatomic_max_t; else \ __asm __volatile (lock "xaddq %q0, %1" \ : "=r" (result), "=m" (*mem) \ - : "0" ((long) (value)), "m" (*mem), \ + : "0" ((atomic64_t) (value)), "m" (*mem), \ "i" (offsetof (tcbhead_t, multiple_threads))); \ result; }) @@ -187,7 +187,7 @@ typedef uintmax_t uatomic_max_t; else \ __asm __volatile (lock "addq %q1, %0" \ : "=m" (*mem) \ - : "ir" ((long) (value)), "m" (*mem), \ + : "ir" ((atomic64_t) (value)), "m" (*mem), \ "i" (offsetof (tcbhead_t, multiple_threads))); \ } while (0) @@ -218,7 +218,7 @@ typedef uintmax_t uatomic_max_t; else \ __asm __volatile (LOCK_PREFIX "addq %q2, %0; sets %1" \ : "=m" (*mem), "=qm" (__result) \ - : "ir" ((long) (value)), "m" (*mem)); \ + : "ir" ((atomic64_t) (value)), "m" (*mem)); \ __result; }) @@ -239,7 +239,7 @@ typedef uintmax_t uatomic_max_t; else \ __asm __volatile (LOCK_PREFIX "addq %q2, %0; setz %1" \ : "=m" (*mem), "=qm" (__result) \ - : "ir" ((long) (value)), "m" (*mem)); \ + : "ir" ((atomic64_t) (value)), "m" (*mem)); \ __result; }) |