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author | caiyinyu <caiyinyu@loongson.cn> | 2023-07-06 16:30:52 +0800 |
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committer | caiyinyu <caiyinyu@loongson.cn> | 2023-07-11 10:56:01 +0800 |
commit | 0d341d09f27fdc48a0e65242f3701ba8ea980b37 (patch) | |
tree | c89c6e11a2113b10a302c840b15f8b3d4bc9f7dc | |
parent | 19f9f7f9d5064ad6608e6d40a3aa1b3db8a4a1ae (diff) | |
download | glibc-0d341d09f27fdc48a0e65242f3701ba8ea980b37.tar.gz glibc-0d341d09f27fdc48a0e65242f3701ba8ea980b37.tar.xz glibc-0d341d09f27fdc48a0e65242f3701ba8ea980b37.zip |
LoongArch: config: Added HAVE_LOONGARCH_VEC_ASM.
This patch checks if assembler supports vector instructions to generate LASX/LSX code or not, and then define HAVE_LOONGARCH_VEC_ASM macro We have added support for vector instructions in binutils-2.41 See: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=75b2f521b101d974354f6ce9ed7c054d8b2e3b7a commit 75b2f521b101d974354f6ce9ed7c054d8b2e3b7a Author: mengqinggang <mengqinggang@loongson.cn> Date: Thu Jun 22 10:35:28 2023 +0800 LoongArch: gas: Add lsx and lasx instructions support gas/ChangeLog: * config/tc-loongarch.c (md_parse_option): Add lsx and lasx option. (loongarch_after_parse_args): Add lsx and lasx option. opcodes/ChangeLog: * loongarch-opc.c (struct loongarch_ase): Add lsx and lasx instructions.
-rw-r--r-- | config.h.in | 5 | ||||
-rw-r--r-- | sysdeps/loongarch/configure | 28 | ||||
-rw-r--r-- | sysdeps/loongarch/configure.ac | 15 |
3 files changed, 48 insertions, 0 deletions
diff --git a/config.h.in b/config.h.in index 44a34072a4..0dedc124f7 100644 --- a/config.h.in +++ b/config.h.in @@ -141,6 +141,11 @@ /* LOONGARCH floating-point ABI for ld.so. */ #undef LOONGARCH_ABI_FRLEN +/* Assembler support LoongArch LASX/LSX vector instructions. + This macro becomes obsolete when glibc increased the minimum + required version of GNU 'binutils' to 2.41 or later. */ +#define HAVE_LOONGARCH_VEC_ASM 0 + /* Linux specific: minimum supported kernel version. */ #undef __LINUX_KERNEL_VERSION diff --git a/sysdeps/loongarch/configure b/sysdeps/loongarch/configure index 52bd08a91e..b090e43a24 100644 --- a/sysdeps/loongarch/configure +++ b/sysdeps/loongarch/configure @@ -101,3 +101,31 @@ fi $as_echo "$libc_cv_loongarch_cmodel_medium" >&6; } config_vars="$config_vars have-cmodel-medium = $libc_cv_loongarch_cmodel_medium" + +# Check if asm support vector instructions. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for vector support in assembler" >&5 +$as_echo_n "checking for vector support in assembler... " >&6; } +if ${libc_cv_loongarch_vec_asm+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat > conftest.s <<\EOF + vld $vr0, $sp, 0 +EOF +if { ac_try='${CC-cc} -c $CFLAGS conftest.s -o conftest 1>&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then + libc_cv_loongarch_vec_asm=yes +else + libc_cv_loongarch_vec_asm=no +fi +rm -f conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_loongarch_vec_asm" >&5 +$as_echo "$libc_cv_loongarch_vec_asm" >&6; } +if test $libc_cv_loongarch_vec_asm = yes; then + $as_echo "#define HAVE_LOONGARCH_VEC_ASM 1" >>confdefs.h + +fi diff --git a/sysdeps/loongarch/configure.ac b/sysdeps/loongarch/configure.ac index cdd95fa512..39efccfd8f 100644 --- a/sysdeps/loongarch/configure.ac +++ b/sysdeps/loongarch/configure.ac @@ -62,3 +62,18 @@ AC_CACHE_CHECK(whether $CC supports option -mcmodel=medium, libc_cv_loongarch_cmodel_medium=no fi]) LIBC_CONFIG_VAR([have-cmodel-medium], [$libc_cv_loongarch_cmodel_medium]) + +# Check if asm support vector instructions. +AC_CACHE_CHECK(for vector support in assembler, libc_cv_loongarch_vec_asm, [dnl +cat > conftest.s <<\EOF + vld $vr0, $sp, 0 +EOF +if AC_TRY_COMMAND(${CC-cc} -c $CFLAGS conftest.s -o conftest 1>&AS_MESSAGE_LOG_FD); then + libc_cv_loongarch_vec_asm=yes +else + libc_cv_loongarch_vec_asm=no +fi +rm -f conftest*]) +if test $libc_cv_loongarch_vec_asm = yes; then + AC_DEFINE(HAVE_LOONGARCH_VEC_ASM) +fi |