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* ppc64: fix setjmp/longjmp handling of TOC pointerBobby Bingham2017-08-112-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | The TOC pointer is constant within a single dso, but needs to be saved and restored around cross-dso calls. The PLT stub saves it to the caller's stack frame, and the linker adds code to the caller to restore it. With a local call, as within a single dso or with static linking, this doesn't happen and the TOC pointer is always in r2. Therefore, setjmp/longjmp need to save/restore the TOC pointer from/to different locations depending on whether the call to setjmp was a local or non-local call. It is always safe for longjmp to restore to both r2 and the caller's stack. If the call to setjmp was local, and only r2 matters and the stack location will be ignored, but is required by the ABI to be reserved for the TOC pointer. If the call was non-local, then only the stack location matters, and whatever is restored into r2 will be clobbered anyway when the caller reloads r2 from the stack. A little extra care is required for sigsetjmp, because it uses setjmp internally. After the second return from this setjmp call, r2 will contain the caller's TOC pointer instead of libc's TOC pointer. We need to save and restore the correct libc pointer before we can tail call to __sigsetjmp_tail.
* make arm setjmp/longjmp asm thumb2-compatibleRich Felker2016-12-172-2/+6
| | | | sp cannot be used in the ldm/stm register set in thumb mode.
* add s390x portBobby Bingham2016-11-112-0/+48
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* add powerpc64 portBobby Bingham2016-05-082-0/+155
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* add mips n32 port (ILP32 ABI for mips64)Rich Felker2016-04-182-0/+70
| | | | based on patch submitted by Jaydeep Patil, with minor changes.
* add powerpc soft-float supportFelix Fietkau2016-03-062-16/+22
| | | | | | | | | Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different instruction set for floating point operations (SPE). Executing regular PowerPC floating point instructions results in "Illegal instruction" errors. Make it possible to run these devices in soft-float mode.
* add mips64 portRich Felker2016-03-062-0/+71
| | | | | patch by Mahesh Bodapati and Jaydeep Patil of Imagination Technologies.
* switch sh and mips setjmp asm from .sub system to .S filesRich Felker2016-01-2020-109/+12
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* use correct nofpu versions of setjmp/longjmp used on sh-nofpu-fdpicRich Felker2015-11-114-0/+4
| | | | | when adding the fdpic subarchs, the need for these sub files was overlooked. thus setjmp and longjmp performed illegal instructions.
* explicitly assemble all arm asm sources as UALRich Felker2015-11-102-0/+2
| | | | | | | | these files are all accepted as legacy arm syntax when producing arm code, but legacy syntax cannot be used for producing thumb2 with access to the full ISA. even after switching to UAL, some asm source files contain instructions which are not valid in thumb mode, so these will need to be addressed separately.
* remove non-working pre-armv4t support from arm asmRich Felker2015-11-092-6/+2
| | | | | | | | | | | | | | | the idea of the three-instruction sequence being removed was to be able to return to thumb code when used on armv4t+ from a thumb caller, but also to be able to run on armv4 without the bx instruction available (in which case the low bit of lr would always be 0). however, without compiler support for generating such a sequence from C code, which does not exist and which there is unlikely to be interest in implementing, there is little point in having it in the asm, and it would likely be easier to add pre-armv4t support via enhanced linker handling of R_ARM_V4BX than at the compiler level. removing this code simplifies adding support for building libc in thumb2-only form (for cortex-m).
* use vfp mnemonics rather than hard-coded opcodes in arm setjmp/longjmpRich Felker2015-11-092-2/+10
| | | | | | | | | | | | | | | | | | the code to save/restore vfp registers needs to build even when the configured target does not have fpu; this is because code using vfp fpu (but with the standard soft-float EABI) may call a libc built for a soft-float only, and the EABI considers these registers call-saved when they exist. thus, extra directives are used to force the assembler to allow vfp instructions and to avoid marking the resulting object files as requiring vfp. moving away from using hard-coded opcode words is necessary in order to eventually support producing thumb2-only output for cortex-m. conditional execution of these instructions based on hwcap flags was already implemented. when building for arm (non-thumb) output, the only currently-supported configuration, this commit does not change the code emitted.
* fix build regression in sh-nofpu subarch due to missing symbolRich Felker2015-04-241-0/+3
| | | | | | commit 646cb9a4a04e5ed78e2dd928bf9dc6e79202f609 switched sigsetjmp to use the new hidden ___setjmp symbol for setjmp, but the nofpu variant of setjmp.s was not updated to match.
* remove invalid PLT calls from or1k asmRich Felker2015-04-191-0/+3
| | | | analogous to commit 646cb9a4a04e5ed78e2dd928bf9dc6e79202f609 for sh.
* remove possible-textrels from powerpc asmRich Felker2015-04-191-0/+3
| | | | | | | these are perfectly fine with ld-time symbol binding, but otherwise result in textrels. they cannot be replaced with @PLT jump targets because the PLT thunks require a GOT register to be setup, so use a hidden alias instead.
* remove invalid PLT calls from microblaze asmRich Felker2015-04-191-0/+3
| | | | analogous to commit 646cb9a4a04e5ed78e2dd928bf9dc6e79202f609 for sh.
* remove invalid PLT calls from sh asmRich Felker2015-04-191-0/+3
| | | | | | these are perfectly fine with ld-time symbol binding, but if the calls go through a PLT thunk, they are invalid because the caller does not setup a GOT register. use a hidden alias to bypass the issue.
* remove the last of possible-textrels from i386 asmRich Felker2015-04-181-0/+3
| | | | | | | | | | | | none of these are actual textrels because of ld-time binding performed by -Bsymbolic-functions, but I'm changing them with the goal of making ld-time binding purely an optimization rather than relying on it for semantic purposes. in the case of memmove's call to memcpy, making it explicit that the memmove asm is assuming the forward-copying behavior of the memcpy asm is desirable anyway; in case memcpy is ever changed, the semantic mismatch would be apparent while editing memmcpy.s.
* add aarch64 portSzabolcs Nagy2015-03-112-0/+48
| | | | | | | | | | This adds complete aarch64 target support including bigendian subarch. Some of the long double math functions are known to be broken otherwise interfaces should be fully functional, but at this point consider this port experimental. Initial work on this port was done by Sireesh Tripurari and Kevin Bortis.
* fix missing comma in sh setjmp asmTrutz Behn2015-01-301-1/+1
| | | | | | this typo did not result in an erroneous setjmp with at least binutils 2.22 but fix it for clarity and compatibility with potentially stricter sh assemblers.
* fix build regression in arm asm for setjmp/longjmp with old assemblersRich Felker2014-11-232-2/+2
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* arm assembly changes for clang compatibilityJoakim Sindholt2014-11-232-2/+2
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* add or1k (OpenRISC 1000) architecture portStefan Kristiansson2014-07-182-0/+49
| | | | | | | | | | | | | | | With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use.
* fix typo in microblaze setjmp asmRich Felker2014-07-081-1/+1
| | | | | | | | r24 was wrongly being saved at a misaligned offset of 30 rather than the correct offset of 40 in the jmp_buf. the exact effects of this error have not been studied, but it's clear that the value of r24 was lost across setjmp/longjmp and the saved values of r21 and/or r22 may also have been corrupted.
* add nofpu subarchs to the sh arch, and properly detect compiler's fpu configRich Felker2014-02-276-0/+47
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* rename superh port to "sh" for consistencyRich Felker2014-02-272-0/+0
| | | | | | | | | linux, gcc, etc. all use "sh" as the name for the superh arch. there was already some inconsistency internally in musl: the dynamic linker was searching for "ld-musl-sh.path" as its path file despite its own name being "ld-musl-superh.so.1". there was some sentiment in both directions as to how to resolve the inconsistency, but overall "sh" was favored.
* add missing sub files for mipsel-sf to use softfloat codeRich Felker2014-02-242-0/+2
| | | | | | the build system has no automatic way to know this code applies to both big (default) and little endian variants, so explicit .sub files are needed.
* mips: add mips-sf subarch support (soft-float)Szabolcs Nagy2014-02-244-0/+52
| | | | | | | | | Userspace emulated floating-point (gcc -msoft-float) is not compatible with the default mips abi (assumes an FPU or in kernel emulation of it). Soft vs hard float abi should not be mixed, __mips_soft_float is checked in musl's configure script and there is no runtime check. The -sf subarch does not save/restore floating-point registers in setjmp/longjmp and only provides dummy fenv implementation.
* superh portBobby Bingham2014-02-232-0/+51
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* import vanilla x86_64 code as x32rofl0r2014-02-232-0/+44
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* remove fenv saving/loading code from setjmp/longjmp on armRich Felker2012-12-052-4/+0
| | | | | | the issue is identical to the recent commit fixing the mips versions: despite other implementations doing this, it conflicts with the requirements of ISO C and it's a waste of time and code size.
* remove mips setjmp/longjmp code to save/restore fenvRich Felker2012-12-052-5/+1
| | | | | | | | | | | | | | | | | | | | | | nothing in the standard requires or even allows the fenv state to be restored by longjmp. restoring the exception flags is not such a big deal since it's probably valid to clobber them completely, but restoring the rounding mode yields an observable side effect not sanctioned by ISO C. saving/restoring it also wastes a few cycles and 16 bytes of code. as for historical behavior, reportedly SGI IRIX did save/restore fenv, and this is where glibc and uClibc got the behavior from. a few other systems save/restore it too (on archs other than mips), even though this is apparently wrong. further details are documented here: http://www-personal.umich.edu/~williams/archive/computation/setjmp-fpmode.html as musl aims for standards conformance rather than coddling historical programs expecting non-conforming behavior, and as it's unlikely that any historical programs actually depend on the incorrect behavior (such programs would break on other archs, anyway), I'm making the change not to save/restore fenv on mips.
* fix powerpc setjmp/longjmp to save/restore float regs; enlarge/align jmp_bufRich Felker2012-11-232-0/+36
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* fix indention with spaces in powerpc asmRich Felker2012-11-142-10/+10
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* PPC port cleaned up, static linking works well now.rofl0r2012-11-134-35/+87
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* import preliminary ppc work by rdp.Richard Pennington2012-11-132-0/+35
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* microblaze portRich Felker2012-09-292-0/+58
| | | | | | based on initial work by rdp, with heavy modifications. some features including threads are untested because qemu app-level emulation seems to be broken and I do not have a proper system image for testing.
* floating point support for arm setjmp/longjmpRich Felker2012-08-052-2/+54
| | | | | | not heavily tested, but at least they don't seem to break anything on soft float targets with or without coprocessors. they check the auxv AT_HWCAP flags to determine which coprocessor, if any, is available.
* optimize arm setjmp/longjmp register saving/loadingRich Felker2012-07-272-6/+2
| | | | | the original code was wrongly based on how it would be done in thumb mode, but that's not needed because musl's asm only targets arm.
* add floating point register saving/restoring to mips setjmp/longjmpRich Felker2012-07-222-1/+29
| | | | | | | also fix the alignment of jmp_buf to meet the abi. linux always emulates fpu on mips if it's not present, so enabling this code unconditionally is "safe" but may be slow. in the long term it may be preferable to find a way to disable it on soft float builds.
* initial version of mips (o32) port, based on work by Richard Pennington (rdp)Rich Felker2012-07-112-0/+50
| | | | | | | | | | | | | basically, this version of the code was obtained by starting with rdp's work from his ellcc source tree, adapting it to musl's build system and coding style, auditing the bits headers for discrepencies with kernel definitions or glibc/LSB ABI or large file issues, fixing up incompatibility with the old binutils from aboriginal linux, and adding some new special cases to deal with the oddities of sigaction and pipe syscall interfaces on mips. at present, minimal test programs work, but some interfaces are broken or missing. threaded programs probably will not link.
* update license of njk contributed code (x86_64 asm)Rich Felker2012-05-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | these changes are based on the following communication via email: "I hereby grant that all of the code I have contributed to musl on or before April 23, 2012 may be licensed under the terms of the following MIT license: Copyright (c) 2011-2012 Nicholas J. Kain Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE."
* initial commit of the arm portRich Felker2011-09-182-0/+32
| | | | | | | | | | | | | this port assumes eabi calling conventions, eabi linux syscall convention, and presence of the kernel helpers at 0xffff0f?0 needed for threads support. otherwise it makes very few assumptions, and the code should work even on armv4 without thumb support, as well as on systems with thumb interworking. the bits headers declare this a little endian system, but as far as i can tell the code should work equally well on big endian. some small details are probably broken; so far, testing has been limited to qemu/aboriginal linux.
* restore use of .type in asm, but use modern @function (vs %function)Rich Felker2011-06-144-0/+10
| | | | | | | | this seems to be necessary to make the linker accept the functions in a shared library (perhaps to generate PLT entries?) strictly speaking libc-internal asm should not need it. i might clean that up later.
* remove all .size and .type directives for functions from the asmRich Felker2011-06-134-20/+0
| | | | | these are useless and have caused problems for users trying to build with non-gnu tools like tcc's assembler.
* modernize coding style in sjlj asmRich Felker2011-05-264-35/+35
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* Port musl to x86-64. One giant commit!Nicholas J. Kain2011-02-152-0/+49
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* initial check-in, version 0.5.0 v0.5.0Rich Felker2011-02-124-0/+45