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* fix spurious trailing whitespace in powerpc & powerpc64 bits/errno.hRich Felker2016-05-082-2/+2
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* add powerpc64 portBobby Bingham2016-05-0828-0/+1907
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* add mips n32 port (ILP32 ABI for mips64)Rich Felker2016-04-1831-0/+2009
| | | | based on patch submitted by Jaydeep Patil, with minor changes.
* add support for mips and mips64 r6 isaRich Felker2016-04-036-22/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | mips32r6 and mips64r6 are actually new isas at both the asm source and opcode levels (pre-r6 code cannot run on r6) and thus need to be treated as a new subarch. the following changes are made, some of which yield code generation improvements for non-r6 targets too: - add subarch logic in configure script and reloc.h files for dynamic linker name. - suppress use of .set mips2 asm directives (used to allow mips2 atomic instructions on baseline mips1 builds; the kernel has to emulate them on mips1) except when actually needed. they cause wrong instruction encodings on r6, and pessimize inlining on at least some compilers. - only hard-code sync instruction encoding on mips1. - use "ZC" constraint instead of "m" constraint for llsc memory operands on r6, where the ll/sc instructions no longer accept full 16-bit offsets. - only hard-code rdhwr instruction encoding with .word on targets (pre-r2) where it may need trap-and-emulate by the kernel. otherwise, just use the instruction mnemonic, and allow an arbitrary destination register to be used.
* fix regression disabling use of pause instruction for x86 a_spinRich Felker2016-03-293-3/+3
| | | | | | | | | | | commits e24984efd5c6ac5ea8e6cb6cd914fa8435d458bc and 16b55298dc4b6a54d287d7494e04542667ef8861 inadvertently disabled the a_spin implementations for i386, x86_64, and x32 by defining a macro named a_pause instead of a_spin. this should not have caused any functional regression, but it inhibited cpu relaxation while spinning for locks. bug reported by George Kulakowski.
* add copy_file_range syscall numbers from linux v4.5Szabolcs Nagy2016-03-199-0/+18
| | | | | | | it was introduced for offloading copying between regular files in linux commit 29732938a6289a15e907da234d6692a2ead71855 (microblaze and sh does not yet have the syscall number.)
* mips64: add recent linux syscall numbersSzabolcs Nagy2016-03-191-0/+6
| | | | add userfaultfd, membarrier and mlock2 system call numbers.
* deduplicate bits/mman.hSzabolcs Nagy2016-03-1812-617/+25
| | | | | | | | | | | currently five targets use the same mman.h constants and the rest share most constants too, so move them to sys/mman.h before the bits/mman.h include where the differences can be corrected by redefinition of the macros. this fixes two minor bugs: POSIX_MADV_DONTNEED was wrong on most targets (it should be the same as MADV_DONTNEED), and sh defined the x86-only MAP_32BIT mmap flag.
* correct pointer types for a_ll_p and a_sc_p primitives on mips64Rich Felker2016-03-111-4/+4
| | | | | | | | these changes should not affect generated code, but they reflect that the underlying objects operated on by a_cas_p are supposed to have type volatile void *, not volatile long. in theory a compiler could treat the effective type mismatch in the "m" memory operands as undefined behavior.
* make mips64 a_sc_p atomic primitive's asm constraints work with clangRich Felker2016-03-111-1/+1
| | | | | | | apparently clang does not accept matching-register input and output constraints that differ in size (32-bit vs 64-bit). based on patch by Jaydeep Patil.
* add powerpc soft-float supportFelix Fietkau2016-03-062-1/+12
| | | | | | | | | Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different instruction set for floating point operations (SPE). Executing regular PowerPC floating point instructions results in "Illegal instruction" errors. Make it possible to run these devices in soft-float mode.
* add mips64 portRich Felker2016-03-0632-0/+2171
| | | | | patch by Mahesh Bodapati and Jaydeep Patil of Imagination Technologies.
* add sched_getcpu vDSO supportNathan Zadoks2016-03-021-0/+2
| | | | | This brings the call to an actually usable speed. Quick unscientific benchmark: 14ns : 102ns :: vDSO : syscall
* make aarch64 atomic_arch.h report that it defines pointer-sized ll/scRich Felker2016-02-231-0/+2
| | | | | | | | at present this is done only for consistency, since this file defines its own a_cas_p rather than using the new generic one from atomic.h added in commit 225f6a6b5b7173b6655e4f5d49b5b9fea70bf3bb. these definitions may however be useful if we ever need to add other pointer-sized atomic operations.
* remove workaround for broken mips assemblersRich Felker2016-02-081-4/+1
| | | | | | | | | | | | | | | | | | | | the workaround was for a bug that botched .gpword references to local labels, applying a nonsensical random offset of -0x4000 to them. this reverses commit 5e396fb996a80b035d0f6ecf7fed50f68aa3ebb7 and a removes a similar hack that was added to syscall_cp.s in the later commit 756c8af8589265e99e454fe3adcda1d0bc5e1963. it turns out one additional instance of the same idiom, the GETFUNCSYM macro in arch/mips/reloc.h, was still affected by the assembler bug and does not admit an easy workaround without making assumptions about how the macro is used. the previous workarounds made static linking work but left the early-stage dynamic linker broken and thus had limited usefulness. instead, affected users (using binutils versions older than 2.20) will need to fix the bug on the binutils side; the trivial patch is commit 453f5985b13e35161984bf1bf657bbab11515aa4 in the binutils-gdb repository.
* better a_sc inline asm constraint on aarch64 and armSzabolcs Nagy2016-01-312-3/+3
| | | | | | | | | | "Q" input constraint was used for the written object, instead of "=Q" output constraint. this should not cause problems because "memory" is on the clobber list, but "=Q" better documents the intent and more consistent with the actual asm code. this changes the generated code, because different registers are used, but other than the register names nothing should change.
* ldso: fix GDB dynamic linker info on MIPSFelix Fietkau2016-01-301-1/+1
| | | | | | | GDB is looking for a pointer to the ldso debug info in the data of the ..rld_map section. Signed-off-by: Felix Fietkau <nbd@openwrt.org>
* deduplicate the bulk of the arch bits headersRich Felker2016-01-2792-3194/+0
| | | | | | | | | | | | all bits headers that were identical for a number of 'clean' archs are moved to the new arch/generic tree. in addition, a few headers that differed only cosmetically from the new generic version are removed. additional deduplication may be possible in mman.h and in several headers (limits.h, posix.h, stdint.h) that mostly depend on whether the arch is 32- or 64-bit, but they are left alone for now because greater gains are likely possible with more invasive changes to header logic, which is beyond the scope of this commit.
* mips: add vdso supportHauke Mehrtens2016-01-271-0/+4
| | | | | | | | | | | | vdso support is available on mips starting with kernel 4.4, see kernel commit a7f4df4e21 "MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime()" for details. In Linux kernel 4.4.0 the mips code returns -ENOSYS in case it can not handle the vdso call and assumes the libc will call the original syscall in this case. Handle this case in musl. Currently Linux kernel 4.4.0 handles the following types: CLOCK_REALTIME_COARSE, CLOCK_MONOTONIC_COARSE, CLOCK_REALTIME and CLOCK_MONOTONIC.
* fix siginfo_t for mipsSzabolcs Nagy2016-01-261-0/+9
| | | | | | | | si_errno and si_code are swapped in mips siginfo_t compared to other archs and some si_code values are different. This fix is required for POSIX timers to work. based on patch by Dmitry Ivanov.
* add MCL_ONFAULT and MLOCK_ONFAULT mlockall and mlock2 flagsSzabolcs Nagy2016-01-2610-0/+10
| | | | | | | | they lock faulted pages into memory (useful when a small part of a large mapped file needs efficient access), new in linux v4.4, commit b0f205c2a3082dd9081f9a94e50658c5fa906ff1 MLOCK_* is not in the POSIX reserved namespace for sys/mman.h
* add mlock2 syscall number from linux v4.4Szabolcs Nagy2016-01-268-0/+16
| | | | | | | this is mlock with a flags argument, new in linux commit a8ca5d0ecbdde5cc3d7accacbd69968b0c98764e as usual microblaze and sh don't have allocated syscall number yet.
* add new membarrier, userfaultfd and switch_endian syscallsSzabolcs Nagy2016-01-268-0/+34
| | | | | | | | | | | | | | | new in linux v4.3 added for aarch64, arm, i386, mips, or1k, powerpc, x32 and x86_64. membarrier is a system wide memory barrier, moves most of the synchronization cost to one side, new in kernel commit 5b25b13ab08f616efd566347d809b4ece54570d1 userfaultfd is useful for qemu and is new in kernel commit 8d2afd96c20316d112e04d935d9e09150e988397 switch_endian is powerpc only for switching endianness, new in commit 529d235a0e190ded1d21ccc80a73e625ebcad09b
* add new i386 socket syscall numbersSzabolcs Nagy2016-01-261-0/+30
| | | | | | | | new in linux v4.3 commit 9dea5dc921b5f4045a18c63eb92e84dc274d17eb direct calls instead of socketcall allow better seccomp filtering. musl continues to use socketcalls internally on i386. (older kernels would need a fallback mechanism if the direct calls were used.)
* change the internal socketcall selection logicSzabolcs Nagy2016-01-261-0/+2
| | | | | | | | only use SYS_socketcall if SYSCALL_USE_SOCKETCALL is defined internally, otherwise use direct syscalls. this commit does not change the current behaviour, it is preparation for adding direct syscall numbers for i386.
* fix arm a_crash for big endianRich Felker2016-01-251-2/+4
| | | | | | | | contrary to commit 89e149d275a7699a4a5e4c98bab267648f64cbba, big endian arm does need the instruction bytes in big endian order. rather than trying to use a special encoding that works as arm or thumb, simply encode the simplest/canonical undefined instructions dependent on whether __thumb__ is defined.
* add native a_crash primitive for armRich Felker2016-01-251-0/+10
| | | | | | | | the .byte directive encodes a guaranteed-undefined instruction, the same one Linux fills the kuser helper page with when it's disabled. the udf mnemonic and and .insn directives are not supported by old binutils versions, and larger-than-byte integer directives would produce the wrong output on big-endian.
* clean powerpc syscall.hSzabolcs Nagy2016-01-241-24/+0
| | | | remove ifdefs for powerpc64.
* add missing powerpc specific PROT_SAO memory protection flagSzabolcs Nagy2016-01-241-0/+1
| | | | | this flag for strong access ordering was added in linux v2.6.27 commit aba46c5027cb59d98052231b36efcbbde9c77a1d
* fix powerpc MCL_* mlockall flags in bits/mman.hSzabolcs Nagy2016-01-241-2/+2
| | | | the definitions didn't match the linux uapi headers.
* fix aarch64 atomics to load/store 32bit onlySzabolcs Nagy2016-01-241-2/+2
| | | | | | a_ll/a_sc inline asm used 64bit register operands (%0) instead of 32bit ones (%w0), this at least broke a_and_64 (which always cleared the top 32bit, leaking memory in malloc).
* improve aarch64 atomicsRich Felker2016-01-231-16/+36
| | | | | | | | | | | | | | | | | aarch64 provides ll/sc variants with acquire/release memory order, freeing us from the need to have full barriers both before and after the ll/sc operation. previously they were not used because the a_cas can fail without performing a_sc, in which case half of the barrier would be omitted. instead, define a custom version of a_cas for aarch64 which uses a_barrier explicitly when aborting the cas operation. aside from cas, other operations built on top of ll/sc are not affected since they never abort but rather loop until they succeed. a split ll/sc version of the pointer-sized a_cas_p is also introduced using the same technique. patch by Szabolcs Nagy.
* remove sh port's __fpscr_values source fileRich Felker2016-01-221-5/+0
| | | | | | | | | commit f3ddd173806fd5c60b3f034528ca24542aecc5b9, the dynamic linker bootstrap overhaul, silently disabled the definition of __fpscr_values in this file since libc.so's copy of __fpscr_values now comes from crt_arch.h, the same place the public definition in the main program's crt1.o ultimately comes from. remove this file which is no longer in use.
* move sh port's __shcall internal function from arch/sh/src to src treeRich Felker2016-01-221-5/+0
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* move sh __unmapself code from arch/sh/src to main src treeRich Felker2016-01-221-24/+0
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* move x32 sysinfo impl and syscall fixup code out of arch/x32/srcRich Felker2016-01-222-88/+0
| | | | | all such arch-specific translation units are being moved to appropriate arch dirs under the main src tree.
* overhaul powerpc atomics for new atomics frameworkRich Felker2016-01-221-14/+38
| | | | | | | | | | | | | previously powerpc had a_cas defined in terms of its native ll/sc style operations, but all other atomics were defined in terms of a_cas. instead define a_ll and a_sc so the compiler can generate optimized versions of all the atomic ops and perform better inlining of a_cas. extracting the result of the sc (stwcx.) instruction is rather awkward because it's natively stored in a condition flag, which is not representable in inline asm. but even with this limitation the new code still seems significantly better.
* clean up x86_64 (and x32) atomics for new atomics frameworkRich Felker2016-01-222-113/+130
| | | | | | | this commit mostly makes consistent things like spacing, function ordering in atomic_arch.h, argument names, use of volatile, etc. a_ctz_l was also removed from x86_64 since atomic.h provides it automatically using a_ctz_64.
* clean up i386 atomics for new atomics frameworkRich Felker2016-01-221-66/+58
| | | | | | | | | | | | this commit mostly makes consistent things like spacing, function ordering in atomic_arch.h, argument names, use of volatile, etc. the fake 64-bit and/or atomics are also removed because the shared atomic.h does a better job of implementing them; it avoids making two atomic memory accesses when only one 32-bit half needs to be touched. no major overhaul is needed or possible because x86 actually has native versions of all the usual atomic operations, rather than using ll/sc or needing cas loops.
* overhaul mips atomics for new atomics frameworkRich Felker2016-01-221-53/+31
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* move arm-specific translation units out of arch/arm/src, to src/*/armRich Felker2016-01-228-244/+0
| | | | | | | this is possible with the new build system that allows src/*/$(ARCH)/* files which do not shadow a file in the parent directory, and yields a more logical organization. eventually it will be possible to remove arch/*/src from the build system.
* overhaul arm atomics for new atomics frameworkRich Felker2016-01-211-142/+38
| | | | | | | | | | | | switch to ll/sc model so that new atomic.h can provide optimized versions of all the atomic primitives without needing an ll/sc loop written in asm for each one. all isa levels which use ldrex/strex now use the inline ll/sc model even if the type of barrier to use is not known until runtime (v6). the cas model is only used for arm v5 and earlier, and it has been optimized to make the call via inline asm with custom constraints rather than as a C function call.
* overhaul aarch64 atomics for new atomics frameworkRich Felker2016-01-211-174/+25
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* overhaul sh atomics for new atomics framework, add j-core cas.l backendRich Felker2016-01-214-287/+30
| | | | | | | | | | | | | | | | sh needs runtime-selected atomic backends since there are a number of supported models that use non-forwards-compatible (non-smp-compatible) atomic mechanisms. previously, the code paths for this were highly inefficient since they involved C function calls with multiple branches in the callee and heavy spills in the caller. the new code performs calls the runtime-selected asm fragment from inline asm with extremely minimal clobbers, rather than using a function call. for the sh4a case where the atomic mechanism is known and there is no forward-compatibility issue, the movli.l and movco.l instructions are provided as a_ll and a_sc, allowing the new shared atomic.h to generate efficient inline versions of all the basic atomic operations without needing a cas loop.
* refactor internal atomic.hRich Felker2016-01-2114-834/+216
| | | | | | | | | | | | | | | rather than having each arch provide its own atomic.h, there is a new shared atomic.h in src/internal which pulls arch-specific definitions from arc/$(ARCH)/atomic_arch.h. the latter can be extremely minimal, defining only a_cas or new ll/sc type primitives which the shared atomic.h will use to construct everything else. this commit avoids making heavy changes to the individual archs' atomic implementations. definitions which are identical or near-identical to what the new shared atomic.h would produce have been removed, but otherwise the changes made are just hooking up the arch-specific files to the new infrastructure. major changes to take advantage of the new system will come in subsequent commits.
* fix build regression for arm pre-v7 from out-of-tree build patchRich Felker2016-01-202-0/+0
| | | | | | | | | | commit 2f853dd6b9a95d5b13ee8f9df762125e0588df5d failed to replicate the old makefile logic that caused arch/arm/src/arm/atomics.s to be built. since this was the only .s file under arch/*/src, rather than trying to reproduce the old logic, I'm just moving it up a level and adjusting the glob pattern in the makefile to catch it. eventually arch/*/src will probably be removed in favor of moving all these files to appropriate src/*/$(ARCH) locations.
* fix dynamic linker path file selection for arm vs armhfRich Felker2016-01-201-3/+3
| | | | | | | | | | the __SOFTFP__ macro which was wrongly being used does not reflect the ABI (arm vs armhf) but just the availability of floating point instructions/registers, so -mfloat-abi=softfp was wrongly being treated as armhf. __ARM_PCS_VFP is the correct predefined macro to check for the armhf EABI variant. this macro usage was corrected for the build process in commit 4918c2bb206bfaaf5a1f7d3448c2f63d5e2b7d56 but reloc.h was apparently overlooked at the time.
* adjust mips crt_arch entry point asm to avoid assembler bugsRich Felker2015-12-291-1/+4
| | | | | | | | | | | | | apparently the .gpword directive does not work reliably with local text labels; values produced were offset by 64k from the correct value, resulting in incorrect computation of the got pointer at runtime. instead, use an external label so that the assembler does not munge the relocation; the linker will then get it right. commit 6fef8cafbd0f6f185897bc87feb1ff66e2e204e1 exposed this issue by removing the old, non-PIE-compatible handwritten crt1.s, which was not affected. presumably mips PIE executables (using Scrt1.o produced from crt_arch.h) were already affected at the time.
* adjust i386 max_align_t definition to work around some broken compilersRich Felker2015-12-291-3/+5
| | | | | | | | | | at least gcc 4.7 claims c++11 support but does not accept the alignas keyword, causing breakage when stddef.h is included in c++11 mode. instead, prefer using __attribute__((__aligned__)) on any compiler with GNU extensions, and only use the alignas keyword as a fallback for other C++ compilers. C code should not be affected by this patch.
* remove visibility suppression by SHARED macro in mips and x32 arch filesRich Felker2015-12-152-6/+0
| | | | | | commit 8a8fdf6398b85c99dffb237e47fa577e2ddc9e77 was intended to remove all such usage, but these arch-specific files were overlooked, leading to inconsistent declarations and definitions.
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