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* fix risc64 conflict with kernel headersBaruch Siach2019-08-061-8/+8
| | | | | | Rename user registers struct definitions to avoid conflict with the asm/ptrace.h kernel header that defines the same structs. Use the __riscv_mc prefix as glibc does.
* update riscv64 syscall numbers to linux v5.1Rich Felker2019-08-031-0/+8
| | | | | | | | commit f3f96f2daa4d00f0e38489fb465cd0244b531abe added these for the rest of the archs, but the patch it corresponded to missed riscv64 since riscv64 was not yet upstream at the time. this caused commit dfc81828f7ab41da08f744c44117a1bb20a05749 to break riscv64 build, due to a wrong assumption that SYS_statx was unconditionally defined.
* remove gratuitously-different arch-specific bits/ipc.h filesRich Felker2019-07-301-12/+0
| | | | | | | | these differ from generic only in using endian-matched padding with a short __ipc_perm_seq field in place of the int field in generic. this is not a documented public interface anyway, and the original intent was to use int here. some ports just inadvertently slipped in the kernel short+padding form.
* move IPC_64 from public bits/ipc.h to syscall_arch.hRich Felker2019-07-301-2/+0
| | | | | | | | | | | | | | | | | | | | the definition of the IPC_64 macro controls the interface between libc and the kernel through syscalls; it's not a public API. the meaning is rather obscure. long ago, Linux's sysvipc *id_ds structures used 16-bit uids/gids and wrong types for a few other fields. this was in the libc5 era, before glibc. the IPC_64 flag (64 is a misnomer; it's more like 32) tells the kernel to use the modern[-ish] versions of the structures. the definition of IPC_64 has nothing to do with whether the arch is 32- or 64-bit. rather, due to either historical accident or intentional obnoxiousness, the kernel only accepts and masks off the 0x100 IPC_64 flag conditional on CONFIG_ARCH_WANT_IPC_PARSE_VERSION, i.e. for archs that want to provide, or that accidentally provided, both. for archs which don't define this option, no masking is performed and commands with the 0x100 bit set will fail as invalid. so ultimately, the definition is just a matter of matching an arbitrary switch defined per-arch in the kernel.
* remove duplicates of new generic bits/msg.hRich Felker2019-07-291-13/+0
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* remove duplicates of new generic bits/sem.hRich Felker2019-07-291-9/+0
| | | | | | some of these were not exact duplicates, but had gratuitously different naming for padding, or omitted the endian checks because the arch is fixed-endian.
* extricate bits/sem.h from x32 time_t hackRich Felker2019-07-291-3/+3
| | | | | | | | | | | | | | various padding fields in the generic bits/sem.h were defined in terms of time_t as a cheap hack standing in for "kernel long", to allow x32 to use the generic version of the file. this was a really bad idea, as it ended up getting copied into lots of arch-specific versions of the bits file, and is a blocker to changing time_t to 64-bit on 32-bit archs. this commit adds an x32-specific version of the header, and changes padding type back from time_t to long (currently the same type on all archs but x32) in the generic header and all the others the hack got copied into.
* remove duplicates of new generic bits/shm.hRich Felker2019-07-291-25/+0
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* remove spurious MAP_32BIT definition from riscv64 archRich Felker2019-07-041-1/+0
| | | | | | this was apparently copied from x86_64; it's not part of the kernel API for riscv64. this change eliminates the need for a riscv64-specific bits header and lets it use the generic one.
* add riscv64 architecture supportRich Felker2019-06-1420-0/+670
Author: Alex Suykov <alex.suykov@gmail.com> Author: Aric Belsito <lluixhi@gmail.com> Author: Drew DeVault <sir@cmpwn.com> Author: Michael Clark <mjc@sifive.com> Author: Michael Forney <mforney@mforney.org> Author: Stefan O'Rear <sorear2@gmail.com> This port has involved the work of many people over several years. I have tried to ensure that everyone with substantial contributions has been credited above; if any omissions are found they will be noted later in an update to the authors/contributors list in the COPYRIGHT file. The version committed here comes from the riscv/riscv-musl repo's commit 3fe7e2c75df78eef42dcdc352a55757729f451e2, with minor changes by me for issues found during final review: - a_ll/a_sc atomics are removed (according to the ISA spec, lr/sc are not safe to use in separate inline asm fragments) - a_cas[_p] is fixed to be a memory barrier - the call from the _start assembly into the C part of crt1/ldso is changed to allow for the possibility that the linker does not place them nearby each other. - DTP_OFFSET is defined correctly so that local-dynamic TLS works - reloc.h LDSO_ARCH logic is simplified and made explicit. - unused, non-functional crti/n asm files are removed. - an empty .sdata section is added to crt1 so that the __global_pointer reference is resolvable. - indentation style errors in some asm files are fixed.