Commit message (Collapse) | Author | Age | Files | Lines | |
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* | collapse out byte order conditions in bits/sem.h for fixed-endian archs | Rich Felker | 2019-07-29 | 1 | -5/+0 |
| | | | | | having preprocessor conditionals on byte order in the bits headers for fixed-endian archs is confusing at best. remove them. | ||||
* | duplicate generic bits/sem.h for each arch using it, in prep to change | Rich Felker | 2019-07-29 | 1 | -0/+16 |
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* | remove or1k version of sem.h | Bobby Bingham | 2016-07-06 | 1 | -11/+0 |
| | | | | | It's identical to the generic version, after evaluating the endian preprocessor checks in the generic version. | ||||
* | add or1k (OpenRISC 1000) architecture port | Stefan Kristiansson | 2014-07-18 | 1 | -0/+11 |
With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. |