about summary refs log tree commit diff
path: root/arch/arm
Commit message (Collapse)AuthorAgeFilesLines
* move pthread types out of per-arch alltypes.hRich Felker2019-10-171-8/+0
| | | | | | | | | | | policy has long been that these definitions are purely a function of whether long/pointer is 32- or 64-bit, and that they are not allowed to vary per-arch. move the definition to the shared alltypes.h.in fragment, using integer constant expressions in terms of sizeof to vary the array dimensions appropriately. I'm not sure whether this is more or less ugly than using preprocessor conditionals and two sets of definitions here, but either way is a lot less ugly than repeating the same thing for every arch.
* define LONG_MAX via arch alltypes.h, strip down bits/limits.hRich Felker2019-10-172-7/+2
| | | | | | | | | | | | | | | | | | | | | LLONG_MAX is uniform for all archs we support and plenty of header and code level logic assumes it is, so it does not make sense for limits.h bits mechanism to pretend it's variable. LONG_BIT can be defined in terms of LONG_MAX; there's no reason to put it in bits. by moving LONG_MAX definition to __LONG_MAX in alltypes.h and moving LLONG_MAX out of bits, there are now no plain-C limits that are defined in the bits header, so the bits header only needs to be included in the POSIX or extended profiles. this allows the feature test macro logic to be removed from the bits header, facilitating a long-term goal of getting such logic out of bits. having __LONG_MAX in alltypes.h will allow further generalization of headers. archs without a constant PAGESIZE no longer need bits/limits.h at all.
* remove use of endian.h from arch reloc.h headers, clean upRich Felker2019-10-171-2/+0
| | | | | | | | | | building on commit 97d35a552ec5b6ddf7923dd2f9a8eb973526acea, __BYTE_ORDER is now available wherever alltypes.h is included. since reloc.h is only used from src/internal/dynlink.h, it can be assumed that __BYTE_ORDER is exposed. reloc.h is not permitted to be included in other contexts, and generally, like most arch headers, lacks inclusion guards that would allow such usage. the mips64 version mistakenly included such guards; they are removed for consistency.
* move __BYTE_ORDER definition to alltypes.hRich Felker2019-10-172-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | this change is motivated by the intersection of several factors. presently, despite being a nonstandard header, endian.h is exposing the unprefixed byte order macros and functions only if _BSD_SOURCE or _GNU_SOURCE is defined. this is to accommodate use of endian.h from other headers, including bits headers, which need to define structure layout in terms of endianness. with time64 switch-over, even more headers will need to do this. at the same time, the resolution of Austin Group issue 162 makes endian.h a standard header for POSIX-future, requiring that it expose the unprefixed macros and the functions even in standards-conforming profiles. changes to meet this new requirement would break existing internal usage of endian.h by causing it to violate namespace where it's used. instead, have the arch's alltypes.h define __BYTE_ORDER, either as a fixed constant or depending on the right arch-specific predefined macros for determining endianness. explicit literals 1234 and 4321 are used instead of __LITTLE_ENDIAN and __BIG_ENDIAN so that there's no danger of getting the wrong result if a macro is undefined and implicitly evaluates to 0 at the preprocessor level. the powerpc (32-bit) bits/endian.h being removed had logic for varying endianness, but our powerpc arch has never supported that and has always been big-endian-only. this logic is not carried over to the new __BYTE_ORDER definition in alltypes.h.
* remove per-arch definitions for va_listRich Felker2019-10-171-3/+0
| | | | | | | now that commit f7f1079796abc6f97c69521d2334e9c7d3945dd8 removed the legacy i386 conditional definition, va_list is in no way arch-specific, and has no reason to be in the future. move it to the shared part of alltypes.h.in
* add new syscall numbers from linux v5.2Szabolcs Nagy2019-09-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | new mount api syscalls were added, same numers on all targets, see linux commit a07b20004793d8926f78d63eb5980559f7813404 vfs: syscall: Add open_tree(2) to reference or clone a mount linux commit 2db154b3ea8e14b04fee23e3fdfd5e9d17fbc6ae vfs: syscall: Add move_mount(2) to move mounts around linux commit 24dcb3d90a1f67fe08c68a004af37df059d74005 vfs: syscall: Add fsopen() to prepare for superblock creation linux commit ecdab150fddb42fe6a739335257949220033b782 vfs: syscall: Add fsconfig() for configuring and managing a context linux commit 93766fbd2696c2c4453dd8e1070977e9cd4e6b6d vfs: syscall: Add fsmount() to create a mount for a superblock linux commit cf3cba4a429be43e5527a3f78859b1bfd9ebc5fb vfs: syscall: Add fspick() to select a superblock for reconfiguration linux commit 9c8ad7a2ff0bfe58f019ec0abc1fb965114dde7d uapi, x86: Fix the syscall numbering of the mount API syscalls [ver #2] linux commit d8076bdb56af5e5918376cd1573a6b0007fc1a89 uapi: Wire up the mount API syscalls on non-x86 arches [ver #2]
* move IPC_STAT definition to a new bits/ipcstat.h fileRich Felker2019-08-021-0/+1
| | | | | | | | | | | | | | | otherwise, 32-bit archs that could otherwise share the generic bits/ipc.h would need to duplicate the struct ipc_perm definition, obscuring the fact that it's the same. sysvipc is not widely used and these headers are not commonly included, so there is no performance gain to be had by limiting the number of indirectly included files here. files with the existing time32 definition of IPC_STAT are added to all current 32-bit archs now, so that when it's changed the change will show up as a change rather than addition of a new file where it's less obvious that the value is changing vs the generic one that was used before.
* duplicate generic bits/msg.h for each arch using it, in prep to changeRich Felker2019-07-291-0/+15
|
* duplicate generic bits/sem.h for each arch using it, in prep to changeRich Felker2019-07-291-0/+16
|
* remove trailing newlines from various versions of bits/shm.hRich Felker2019-07-291-1/+0
|
* duplicate generic bits/shm.h for each arch using it, in prep to changeRich Felker2019-07-291-0/+28
| | | | | | | | | | | | | there are more archs sharing the generic 64-bit version of the struct, which is uniform and much more reasonable, than sharing the current "generic" one, and depending on how time64 sysvipc is done for 32-bit archs, even more may be sharing the "64-bit version" in the future. so, duplicate the current generic to all archs using it (arm, i386, m68k, microblaze, or1k) so that the generic can be changed freely. this is recorded as its own commit mainly as a hint to git tooling, to assist in copy/move tracking.
* decouple struct stat from kernel typeRich Felker2019-07-181-0/+21
| | | | | | | | | | | | | | | presently, all archs/ABIs have struct stat matching the kernel stat[64] type, except mips/mipsn32/mips64 which do conversion hacks in syscall_arch.h to work around bugs in the kernel type. this patch completely decouples them and adds a translation step to the success path of fstatat. at present, this is just a gratuitous copying, but it opens up multiple possibilities for future support for 64-bit time_t on 32-bit archs and for cleaned-up/unified ABIs. for clarity, the mips hacks are not yet removed in this commit, so the mips kstat structs still correspond to the output of the hacks in their syscall_arch.h files, not the raw kernel type. a subsequent commit will fix this.
* fix build failure on arm building C code in thumb1 modeRich Felker2019-07-151-1/+1
| | | | | | | | | | | | a fully thumb1 build is not supported because some asm files are incompatible with thumb1, but apparently it works to compile the C code as thumb1 commit 06fbefd10046a0fae7e588b7c6d25fb51811b931 caused this regression but introducing use of the clz instruction, which is not supported in arm mode prior to v5, and not supported in thumb prior to thumb2 (v6t2). commit 1b9406b03c0a94ebe2076a8fc1746a8c45e78a83 fixed the issue only for arm mode pre-v5 but left thumb1 broken.
* add new syscall numbers from linux v5.1Szabolcs Nagy2019-07-011-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | syscall numbers are now synced up across targets (starting from 403 the numbers are the same on all targets other than an arch specific offset) IPC syscalls sem*, shm*, msg* got added where they were missing (except for semop: only semtimedop got added), the new semctl, shmctl, msgctl imply IPC_64, see linux commit 0d6040d4681735dfc47565de288525de405a5c99 arch: add split IPC system calls where needed new 64bit time_t syscall variants got added on 32bit targets, see linux commit 48166e6ea47d23984f0b481ca199250e1ce0730a y2038: add 64-bit time_t syscalls to all 32-bit architectures new async io syscalls got added, see linux commit 2b188cc1bb857a9d4701ae59aa7768b5124e262e Add io_uring IO interface linux commit edafccee56ff31678a091ddb7219aba9b28bc3cb io_uring: add support for pre-mapped user IO buffers a new syscall got added that uses the fd of /proc/<pid> as a stable handle for processes: allows sending signals without pid reuse issues, intended to eventually replace rt_sigqueueinfo, kill, tgkill and rt_tgsigqueueinfo, see linux commit 3eb39f47934f9d5a3027fe00d906a45fe3a15fad signal: add pidfd_send_signal() syscall on some targets (arm, m68k, s390x, sh) some previously missing syscall numbers got added as well.
* arm: add io_pgetevents syscall number from v4.19Szabolcs Nagy2019-03-131-0/+1
| | | | wired up in linux commit 73aeb2cbcdc9be391b3d32a55319a59ce425426f
* add io_pgetevents and rseq syscall numbers from linux v4.18Szabolcs Nagy2018-12-091-0/+1
| | | | | | | | io_pgetevents is new in linux commit 7a074e96dee62586c935c80cecd931431bfdd0be rseq is new in linux commit d7822b1e24f2df5df98c76f0e94a5416349ff759
* make thread-pointer-loading asm non-volatileRich Felker2018-10-161-2/+2
| | | | | | | | | | this will allow the compiler to cache and reuse the result, meaning we no longer have to take care not to load it more than once for the sake of archs where the load may be expensive. depends on commit 1c84c99913bf1cd47b866ed31e665848a0da84a2 for correctness, since otherwise the compiler could hoist loads during stage 3 of dynamic linking before the initial thread-pointer setup.
* add TLSDESC support for 32-bit armRich Felker2018-10-011-1/+3
| | | | | | | | | | | | | | | unlike other asm where the baseline ISA is used, these functions are hot paths and use ISA-level specializations. call-clobbered vfp registers are saved before calling __tls_get_new, since there is no guarantee it won't use them. while setjmp/longjmp have to use hwcap to decide whether to the fpu is in use, since application code could be using vfp registers even if libc was compiled as pure softfloat, __tls_get_new is part of libc and can be assumed not to have access to vfp registers if tlsdesc.S does not. thus it suffices just to check the predefined preprocessor macros. the check for __ARM_PCS_VFP is redundant; !__SOFTFP__ must always be true if the target ISA level includes fpu instructions/registers.
* add arm and sh bits/ptrace.hSzabolcs Nagy2018-09-201-0/+25
| | | | | | These should have been added in commit df6d9450ea19fd71e52cf5cdb4c85beb73066394 that added target specific PTRACE_ macros, but somehow got missed.
* define and use internal macros for hidden visibility, weak refsRich Felker2018-09-052-3/+4
| | | | | | | | | this cleans up what had become widespread direct inline use of "GNU C" style attributes directly in the source, and lowers the barrier to increased use of hidden visibility, which will be useful to recovering some of the efficiency lost when the protected visibility hack was dropped in commit dc2f368e565c37728b0d620380b849c3a1ddd78f, especially on archs where the PLT ABI is costly.
* work around broken kernel struct ipc_perm on some big endian archsRich Felker2018-06-201-0/+2
| | | | | | | | | | | | | | | the mode member of struct ipc_perm is specified by POSIX to have type mode_t, which is uniformly defined as unsigned int. however, Linux defines it with type __kernel_mode_t, and defines __kernel_mode_t as unsigned short on some archs. since there is a subsequent padding field, treating it as a 32-bit unsigned int works on little endian archs, but the order is backwards on big endian archs with the erroneous definition. since multiple archs are affected, remedy the situation with fixup code in the affected functions (shmctl, semctl, and msgctl) rather than repeating the same shims in syscall_arch.h for every affected arch.
* fix TLS layout of TLS variant I when there is a gap above TPSzabolcs Nagy2018-06-022-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | In TLS variant I the TLS is above TP (or above a fixed offset from TP) but on some targets there is a reserved gap above TP before TLS starts. This matters for the local-exec tls access model when the offsets of TLS variables from the TP are hard coded by the linker into the executable, so the libc must compute these offsets the same way as the linker. The tls offset of the main module has to be alignup(GAP_ABOVE_TP, main_tls_align). If there is no TLS in the main module then the gap can be ignored since musl does not use it and the tls access models of shared libraries are not affected. The previous setup only worked if (tls_align & -GAP_ABOVE_TP) == 0 (i.e. TLS did not require large alignment) because the gap was treated as a fixed offset from TP. Now the TP points at the end of the pthread struct (which is aligned) and there is a gap above it (which may also need alignment). The fix required changing TP_ADJ and __pthread_self on affected targets (aarch64, arm and sh) and in the tlsdesc asm the offset to access the dtv changed too.
* work around arm gcc's rejection of r7 asm constraints in thumb modeRich Felker2018-05-011-14/+39
| | | | | | | | | | | | | | | | | | | | | | | in thumb mode, r7 is the ABI frame pointer register, and unless frame pointer is disabled, gcc insists on treating it as a fixed register, refusing to spill it to satisfy constraints. unfortunately, r7 is also used in the syscall ABI for passing the syscall number. up til now we just treated this as a requirement to disable frame pointer when generating code as thumb, but it turns out gcc forcibly enables frame pointer, and the fixed register constraint that goes with it, for functions which contain VLAs. this produces an unacceptable arch-specific constraint that (non-arm-specific) source files making syscalls cannot use VLAs. as a workaround, avoid r7 register constraints when producing thumb code and instead save/restore r7 in a temp register as part of the asm block. at some point we may want/need to support armv6-m/thumb1, so the asm has been tweaked to be thumb1-compatible while also near-optimal for thumb2: it allows the temp and/or syscall number to be in high registers (necessary since r0-r5 may all be used for syscalll args) and in thumb2 mode allows the syscall number to be an 8-bit immediate.
* arm: use a_ll/a_sc atomics when building for ARMv6T2Andre McCurdy2018-04-191-1/+1
| | | | | ARMv6 cores with support for Thumb2 can take advantage of the "ldrex" and "strex" based implementations of a_ll and a_sc.
* arm: respect both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macrosAndre McCurdy2018-04-192-2/+2
| | | | | | | | | | | | __ARM_ARCH_6ZK__ is a gcc specific historical typo which may not be defined by other compilers. https://gcc.gnu.org/ml/gcc-patches/2015-07/msg02237.html To avoid unexpected results when building for ARMv6KZ with clang, the correct form of the macro (ie 6KZ) needs to be tested. The incorrect form of the macro (ie 6ZK) still needs to be tested for compatibility with pre-2015 versions of gcc.
* provide optimized a_ctz_32 for armAndre McCurdy2018-04-191-0/+12
| | | | | | Provide an ARM specific a_ctz_32 helper function for architecture versions for which it can be implemented efficiently via the "rbit" instruction (ie all Thumb-2 capable versions of ARM v6 and above).
* arm: add get_tls syscall from linux v4.15Szabolcs Nagy2018-02-221-0/+1
| | | | | for systems without tp register or kuser helper, new in linux commit 8fcd6c45f5a65621ec809b7866a3623e9a01d4ed
* add statx syscall numbers from linux v4.11Szabolcs Nagy2017-11-051-0/+1
| | | | | statx was added in linux commit a528d35e8bfcc521d7cb70aaf03e1bd296c8493f (there is no libc wrapper yet and microblaze and sh misses the number).
* fix build regression on ARM for ISA levels less than v5Rich Felker2017-10-251-0/+4
| | | | | | | | | | | commit 06fbefd10046a0fae7e588b7c6d25fb51811b931 (first included in release 1.1.17) introduced this regression. patch by Adrian Bunk. it fixes the regression in all cases, but spuriously prevents use of the clz instruction on very old compiler versions that don't define __ARM_ARCH. this may be fixed in a more general way at some point in the future. it also omits thumb1 logic since building as thumb1 code is currently not supported.
* make syscall.h consistent with linuxSzabolcs Nagy2017-09-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | most of the found naming differences don't matter to musl, because internally it unifies the syscall names that vary across targets, but for external code the names should match the kernel uapi. aarch64: __NR_fstatat is called __NR_newfstatat in linux. __NR_or1k_atomic got mistakenly copied from or1k. arm: __NR_arm_sync_file_range is an alias for __NR_sync_file_range2 __NR_fadvise64_64 is called __NR_arm_fadvise64_64 in linux, the old non-arm name is kept too, it should not cause issues. (powerpc has similar nonstandard fadvise and it uses the normal name.) i386: __NR_madvise1 was removed from linux in commit 303395ac3bf3e2cb488435537d416bc840438fcb 2011-11-11 microblaze: __NR_fadvise, __NR_fstatat, __NR_pread, __NR_pwrite had different name in linux. mips: __NR_fadvise, __NR_fstatat, __NR_pread, __NR_pwrite, __NR_select had different name in linux. mipsn32: __NR_fstatat is called __NR_newfstatat in linux. or1k: __NR__llseek is called __NR_llseek in linux. the old name is kept too because that's the name musl uses internally. powerpc: __NR_{get,set}res{gid,uid}32 was never present in powerpc linux. __NR_timerfd was briefly defined in linux but then got renamed.
* arm: add HWCAP_ARM_ hwcap macrosSzabolcs Nagy2017-08-291-0/+24
| | | | | | | Glibc renamed the linux uapi HWCAP_* macros to HWCAP_ARM_* so have both variants in case some code depends on it. (The HWCAP2_ macros are not defined in glibc currently so those only have the linux uapi variant.)
* add a_clz_64 helper functionSzabolcs Nagy2017-08-291-0/+7
| | | | | | | | | counts leading zero bits of a 64bit int, undefined on zero input. (has nothing to do with atomics, added to atomic.h so target specific helper functions are together.) there is a logarithmic generic implementation and another in terms of a 32bit a_clz_32 on targets where that's available.
* allow page size to vary on armRich Felker2017-02-221-1/+0
| | | | | | | | | | | the ABI for arm was silently changed at some point to allow page sizes other than 4k; traditional binaries built with only 4k-aligned offsets between load segments cannot run on such systems, but newer binutils versions use 64k offset alignment. while larger page size is undesirable for various reasons, users have encountered hardware and/or kernels that lock the page size to a larger value, so follow the new ABI and allow it to vary.
* add pkey_{mprotect,alloc,free} syscalls from linux v4.9Szabolcs Nagy2016-12-291-0/+3
| | | | | see linux commit e8c24d3a23a469f1f40d4de24d872ca7023ced0a and linux Documentation/x86/protection-keys.txt
* rework arm atomic/tp backends to be thumb-compatible and fdpic-readyRich Felker2016-12-192-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | three problems are addressed: - use of pc arithmetic, which was difficult if not impossible to make correct in thumb mode on all models, so that relative rather than absolute pointers to the backends could be used. this was designed back when there was no coherent model for the early stages of the dynamic linker before relocations, and is no longer necessary. - assumption that data (the relative pointers to the backends) can be accessed at a constant displacement from the code. this will not be possible on future fdpic subarchs (for cortex-m), so move responsibility for loading the backend code address to the caller. - hard-coded arm opcodes using the .word directive. instead, use the .arch directive to work around the assembler's refusal to assemble instructions not available (or in some cases, available but just considered deprecated) in the target isa level. the obscure v6t2 arch is used for v6 code so as to (1) allow generation of thumb2 output if -mthumb is active, and (2) avoid warnings/errors for mcr barriers that clang would produce if we just set arch to v7-a. in addition, the __aeabi_read_tp function is moved out of the inner workings and implemented as an asm wrapper around a C function, so that asm code does not need to read global data. the asm wrapper serves to satisfy the ABI calling convention requirements for this function.
* add bits/hwcap.h and include it in sys/auxv.hSzabolcs Nagy2016-10-201-0/+29
| | | | | | | | | aarch64, arm, mips, mips64, mipsn32, powerpc, powerpc64 and sh have cpu feature bits defined in linux for AT_HWCAP auxv entry, so expose those in sys/auxv.h it seems the mips hwcaps were never exposed to userspace neither by linux nor by glibc, but that's most likely an oversight.
* make brace placement in public header typedef'd structs consistentRich Felker2016-07-031-2/+1
| | | | | | commit befa5866ee30d09c0c96e88af2eabff5911342ea performed this change for struct definitions that did not also involve typedef, but omitted the latter.
* make brace placement in public header struct definitions consistentRich Felker2016-07-031-2/+1
| | | | | | | | | | | | | | placing the opening brace on the same line as the struct keyword/tag is the style I prefer and seems to be the prevailing practice in more recent additions. these changes were generated by the command: find include/ arch/*/bits -name '*.h' \ -exec sed -i '/^struct [^;{]*$/{N;s/\n/ /;}' {} + and subsequently checked by hand to ensure that the regex did not pick up any false positives.
* fix FIOQSIZE in arm ioctl.hSzabolcs Nagy2016-07-031-0/+2
| | | | | arm ioctl.h is the same as the generic one except this macro, so a workaround solution is used to avoid another ioctl.h copy.
* fix posix_fadvise syscall args on powerpc, unify with arm fixRich Felker2016-07-011-0/+2
| | | | | | | | | commit 6d38c9cf80f47623e5e48190046673bbd0dc410b provided an arm-specific version of posix_fadvise to address the alternate argument order the kernel expects on arm, but neglected to address that powerpc (32-bit) has the same issue. instead of having arch variant files in duplicate, simply put the alternate version in the top-level file under the control of a macro defined in syscall_arch.h.
* add preadv2 and pwritev2 syscall numbers for linux v4.6Szabolcs Nagy2016-06-091-0/+2
| | | | | | | | the syscalls take an additional flag argument, they were added in commit f17d8b35452cab31a70d224964cd583fb2845449 and a RWF_HIPRI priority hint flag was added to linux/fs.h in 97be7ebe53915af504fb491fb99f064c7cf3cb09. the syscall is not allocated for microblaze and sh yet.
* deduplicate __NR_* and SYS_* syscall number definitionsBobby Bingham2016-05-121-349/+0
|
* add copy_file_range syscall numbers from linux v4.5Szabolcs Nagy2016-03-191-0/+2
| | | | | | | it was introduced for offloading copying between regular files in linux commit 29732938a6289a15e907da234d6692a2ead71855 (microblaze and sh does not yet have the syscall number.)
* deduplicate bits/mman.hSzabolcs Nagy2016-03-181-59/+0
| | | | | | | | | | | currently five targets use the same mman.h constants and the rest share most constants too, so move them to sys/mman.h before the bits/mman.h include where the differences can be corrected by redefinition of the macros. this fixes two minor bugs: POSIX_MADV_DONTNEED was wrong on most targets (it should be the same as MADV_DONTNEED), and sh defined the x86-only MAP_32BIT mmap flag.
* better a_sc inline asm constraint on aarch64 and armSzabolcs Nagy2016-01-311-1/+1
| | | | | | | | | | "Q" input constraint was used for the written object, instead of "=Q" output constraint. this should not cause problems because "memory" is on the clobber list, but "=Q" better documents the intent and more consistent with the actual asm code. this changes the generated code, because different registers are used, but other than the register names nothing should change.
* deduplicate the bulk of the arch bits headersRich Felker2016-01-2713-594/+0
| | | | | | | | | | | | all bits headers that were identical for a number of 'clean' archs are moved to the new arch/generic tree. in addition, a few headers that differed only cosmetically from the new generic version are removed. additional deduplication may be possible in mman.h and in several headers (limits.h, posix.h, stdint.h) that mostly depend on whether the arch is 32- or 64-bit, but they are left alone for now because greater gains are likely possible with more invasive changes to header logic, which is beyond the scope of this commit.
* add MCL_ONFAULT and MLOCK_ONFAULT mlockall and mlock2 flagsSzabolcs Nagy2016-01-261-0/+1
| | | | | | | | they lock faulted pages into memory (useful when a small part of a large mapped file needs efficient access), new in linux v4.4, commit b0f205c2a3082dd9081f9a94e50658c5fa906ff1 MLOCK_* is not in the POSIX reserved namespace for sys/mman.h
* add mlock2 syscall number from linux v4.4Szabolcs Nagy2016-01-261-0/+2
| | | | | | | this is mlock with a flags argument, new in linux commit a8ca5d0ecbdde5cc3d7accacbd69968b0c98764e as usual microblaze and sh don't have allocated syscall number yet.
* add new membarrier, userfaultfd and switch_endian syscallsSzabolcs Nagy2016-01-261-0/+4
| | | | | | | | | | | | | | | new in linux v4.3 added for aarch64, arm, i386, mips, or1k, powerpc, x32 and x86_64. membarrier is a system wide memory barrier, moves most of the synchronization cost to one side, new in kernel commit 5b25b13ab08f616efd566347d809b4ece54570d1 userfaultfd is useful for qemu and is new in kernel commit 8d2afd96c20316d112e04d935d9e09150e988397 switch_endian is powerpc only for switching endianness, new in commit 529d235a0e190ded1d21ccc80a73e625ebcad09b
* fix arm a_crash for big endianRich Felker2016-01-251-2/+4
| | | | | | | | contrary to commit 89e149d275a7699a4a5e4c98bab267648f64cbba, big endian arm does need the instruction bytes in big endian order. rather than trying to use a special encoding that works as arm or thumb, simply encode the simplest/canonical undefined instructions dependent on whether __thumb__ is defined.
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-11-18 00:11:30 +0000