about summary refs log tree commit diff
path: root/src/thread
diff options
context:
space:
mode:
Diffstat (limited to 'src/thread')
-rw-r--r--src/thread/arm/__set_thread_area.s12
-rw-r--r--src/thread/arm/__unmapself.s8
-rw-r--r--src/thread/arm/clone.s35
-rw-r--r--src/thread/arm/syscall_cp.s23
4 files changed, 78 insertions, 0 deletions
diff --git a/src/thread/arm/__set_thread_area.s b/src/thread/arm/__set_thread_area.s
new file mode 100644
index 00000000..63d8884f
--- /dev/null
+++ b/src/thread/arm/__set_thread_area.s
@@ -0,0 +1,12 @@
+.text
+.global __set_thread_area
+.type   __set_thread_area,%function
+__set_thread_area:
+	mov r1,r7
+	mov r7,#0x0f0000
+	add r7,r7,#5
+	svc 0
+	mov r7,r1
+	tst lr,#1
+	moveq pc,lr
+	bx lr
diff --git a/src/thread/arm/__unmapself.s b/src/thread/arm/__unmapself.s
new file mode 100644
index 00000000..62ebb7c1
--- /dev/null
+++ b/src/thread/arm/__unmapself.s
@@ -0,0 +1,8 @@
+.text
+.global __unmapself
+.type   __unmapself,%function
+__unmapself:
+	mov r7,#91
+	svc 0
+	mov r7,#1
+	svc 0
diff --git a/src/thread/arm/clone.s b/src/thread/arm/clone.s
new file mode 100644
index 00000000..65cd3f5a
--- /dev/null
+++ b/src/thread/arm/clone.s
@@ -0,0 +1,35 @@
+.text
+.global __clone
+.weak clone
+.type   __clone,%function
+.type   clone,%function
+__clone:
+clone:
+	stmfd sp!,{r4,r5,r6,r7}
+	mov r7,#120
+	mov r6,r3
+	mov r5,r0
+	mov r0,r2
+	and r1,r1,#-16
+	ldr r2,[sp,#16]
+	ldr r3,[sp,#20]
+	ldr r4,[sp,#24]
+	svc 0
+	tst r0,r0
+	beq 1f
+	ldmfd sp!,{r4,r5,r6,r7}
+	tst lr,#1
+	moveq pc,lr
+	bx lr
+
+1:	mov r0,r6
+	tst r5,#1
+	bne 1f
+	mov lr,pc
+	mov pc,r5
+2:	mov r1,r0
+	mov r0,#1
+	svc
+
+1:	blx r5
+	b 2b
diff --git a/src/thread/arm/syscall_cp.s b/src/thread/arm/syscall_cp.s
new file mode 100644
index 00000000..59924fc5
--- /dev/null
+++ b/src/thread/arm/syscall_cp.s
@@ -0,0 +1,23 @@
+.global __syscall_cp_asm
+.type __syscall_cp_asm,%function
+__syscall_cp_asm:
+	mov ip,sp
+	stmfd sp!,{r4,r5,r6,r7,lr}
+	stmfd sp!,{r0}
+	bl 1f
+1:	mov r4,#(1f-.)
+	add r4,r4,lr
+	str r4,[r0,#4]
+	str sp,[r0]
+	mov r7,r1
+	mov r0,r2
+	mov r1,r3
+	ldmfd ip,{r2,r3,r4,r5,r6}
+1:	svc 0
+	ldmfd sp!,{r1}
+	mov r2,#0
+	str r2,[r1]
+	ldmfd sp!,{r4,r5,r6,r7,lr}
+	tst lr,#1
+	moveq pc,lr
+	bx lr