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authorSzabolcs Nagy <nsz@port70.net>2013-08-18 20:08:18 +0000
committerSzabolcs Nagy <nsz@port70.net>2013-08-18 20:08:18 +0000
commita6b0170a7f51fdea9beec57ae794221290af232b (patch)
tree22651ba3480fc272933133af780e6beb10ab2d3d /src/fenv/armhf/fenv.s
parentd8764bf84022397ff9d22310f78fcd78d801e2bf (diff)
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fix fenv exception functions to mask their argument
fesetround.c is a wrapper to do the arch independent argument
check (on archs where rounding mode is not stored in 2 bits
__fesetround still has to check its arguments)

on powerpc fe*except functions do not accept the extra invalid
flags of its fpscr register

the useless FENV_ACCESS pragma was removed from feupdateenv
Diffstat (limited to 'src/fenv/armhf/fenv.s')
-rw-r--r--src/fenv/armhf/fenv.s9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/fenv/armhf/fenv.s b/src/fenv/armhf/fenv.s
index ee81b3d5..26ac87e1 100644
--- a/src/fenv/armhf/fenv.s
+++ b/src/fenv/armhf/fenv.s
@@ -5,9 +5,9 @@ fegetround:
 	and r0, r0, #0xc00000
 	bx lr
 
-.global fesetround
-.type fesetround,%function
-fesetround:
+.global __fesetround
+.type __fesetround,%function
+__fesetround:
 	mrc p10, 7, r3, cr1, cr0, 0
 	bic r3, r3, #0xc00000
 	orr r3, r3, r0
@@ -18,6 +18,7 @@ fesetround:
 .global fetestexcept
 .type fetestexcept,%function
 fetestexcept:
+	and r0, r0, #0x1f
 	mrc p10, 7, r3, cr1, cr0, 0
 	and r0, r0, r3
 	bx lr
@@ -25,6 +26,7 @@ fetestexcept:
 .global feclearexcept
 .type feclearexcept,%function
 feclearexcept:
+	and r0, r0, #0x1f
 	mrc p10, 7, r3, cr1, cr0, 0
 	bic r3, r3, r0
 	mcr p10, 7, r3, cr1, cr0, 0
@@ -34,6 +36,7 @@ feclearexcept:
 .global feraiseexcept
 .type feraiseexcept,%function
 feraiseexcept:
+	and r0, r0, #0x1f
 	mrc p10, 7, r3, cr1, cr0, 0
 	orr r3, r3, r0
 	mcr p10, 7, r3, cr1, cr0, 0