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authorRich Felker <dalias@aerifal.cx>2018-10-01 18:37:02 -0400
committerRich Felker <dalias@aerifal.cx>2018-10-01 18:37:02 -0400
commit0beb9dfbecad38af9759b1e83eeb007e28b70abb (patch)
tree75c42c8b544a480ba0a7664ebe83d88de654cd60 /ldso
parent4d0a82170a25464c39522d7190b9fe302045ddb2 (diff)
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add TLSDESC support for 32-bit arm
unlike other asm where the baseline ISA is used, these functions are
hot paths and use ISA-level specializations.

call-clobbered vfp registers are saved before calling __tls_get_new,
since there is no guarantee it won't use them. while setjmp/longjmp
have to use hwcap to decide whether to the fpu is in use, since
application code could be using vfp registers even if libc was
compiled as pure softfloat, __tls_get_new is part of libc and can be
assumed not to have access to vfp registers if tlsdesc.S does not.
thus it suffices just to check the predefined preprocessor macros. the
check for __ARM_PCS_VFP is redundant; !__SOFTFP__ must always be true
if the target ISA level includes fpu instructions/registers.
Diffstat (limited to 'ldso')
-rw-r--r--ldso/dynlink.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/ldso/dynlink.c b/ldso/dynlink.c
index 3ecbddfa..c2892b90 100644
--- a/ldso/dynlink.c
+++ b/ldso/dynlink.c
@@ -458,6 +458,13 @@ static void do_relocs(struct dso *dso, size_t *rel, size_t rel_size, size_t stri
 					+ addend;
 #endif
 			}
+#ifdef TLSDESC_BACKWARDS
+			/* Some archs (32-bit ARM at least) invert the order of
+			 * the descriptor members. Fix them up here. */
+			size_t tmp = reloc_addr[0];
+			reloc_addr[0] = reloc_addr[1];
+			reloc_addr[1] = tmp;
+#endif
 			break;
 		default:
 			error("Error relocating %s: unsupported relocation type %d",