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authorStefan Kristiansson <stefan.kristiansson@saunalahti.fi>2014-07-17 22:09:10 +0300
committerRich Felker <dalias@aerifal.cx>2014-07-18 14:10:23 -0400
commit200d15479c0bc48471ee7b8e538ce33af990f82e (patch)
tree864cc38895b9277384ed3a956f4ad324de2c4455 /configure
parent7bece9c2095ee81f14b1088f6b0ba2f37fecb283 (diff)
downloadmusl-200d15479c0bc48471ee7b8e538ce33af990f82e.tar.gz
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add or1k (OpenRISC 1000) architecture port
With the exception of a fenv implementation, the port is fully featured.
The port has been tested in or1ksim, the golden reference functional
simulator for OpenRISC 1000.
It passes all libc-test tests (except the math tests that
requires a fenv implementation).

The port assumes an or1k implementation that has support for
atomic instructions (l.lwa/l.swa).

Although it passes all the libc-test tests, the port is still
in an experimental state, and has yet experienced very little
'real-world' use.
Diffstat (limited to 'configure')
-rwxr-xr-xconfigure1
1 files changed, 1 insertions, 0 deletions
diff --git a/configure b/configure
index 7436210f..673d2913 100755
--- a/configure
+++ b/configure
@@ -250,6 +250,7 @@ x86_64-x32*|x32*|x86_64*x32) ARCH=x32 ;;
 x86_64*) ARCH=x86_64 ;;
 mips*) ARCH=mips ;;
 microblaze*) ARCH=microblaze ;;
+or1k*) ARCH=or1k ;;
 powerpc*) ARCH=powerpc ;;
 sh[1-9bel-]*|sh|superh*) ARCH=sh ;;
 unknown) fail "$0: unable to detect target arch; try $0 --target=..." ;;