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author | Rich Felker <dalias@aerifal.cx> | 2015-11-09 21:14:07 -0500 |
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committer | Rich Felker <dalias@aerifal.cx> | 2015-11-09 21:14:07 -0500 |
commit | cf40375e8fd14fc02a850af90b145d324d0381b5 (patch) | |
tree | bb37e26c9b2ca9b2b969cad83303424de3507ef6 /arch | |
parent | ea1e2c5e18dd0790fb9b2af2bd947f4981736dc2 (diff) | |
download | musl-cf40375e8fd14fc02a850af90b145d324d0381b5.tar.gz musl-cf40375e8fd14fc02a850af90b145d324d0381b5.tar.xz musl-cf40375e8fd14fc02a850af90b145d324d0381b5.zip |
use vfp mnemonics rather than hard-coded opcodes in arm setjmp/longjmp
the code to save/restore vfp registers needs to build even when the configured target does not have fpu; this is because code using vfp fpu (but with the standard soft-float EABI) may call a libc built for a soft-float only, and the EABI considers these registers call-saved when they exist. thus, extra directives are used to force the assembler to allow vfp instructions and to avoid marking the resulting object files as requiring vfp. moving away from using hard-coded opcode words is necessary in order to eventually support producing thumb2-only output for cortex-m. conditional execution of these instructions based on hwcap flags was already implemented. when building for arm (non-thumb) output, the only currently-supported configuration, this commit does not change the code emitted.
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions