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authorRich Felker <dalias@aerifal.cx>2014-07-19 15:57:48 -0400
committerRich Felker <dalias@aerifal.cx>2014-07-28 00:28:00 -0400
commit3c548e6eda4b38a579b5bc74af08477304fa376c (patch)
treeb1fb9401ae73183364af35332b694bdb36067d5a /arch
parente30a16314d08667aa3302e2df5baaa23b80a3aa2 (diff)
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fix missing barrier instructions in powerpc atomic asm
(cherry picked from commit 1456b7ae6b72a4f2c446243acdde7c951268d4ab)
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/atomic.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/atomic.h b/arch/powerpc/atomic.h
index a1049bdb..c4ad40cd 100644
--- a/arch/powerpc/atomic.h
+++ b/arch/powerpc/atomic.h
@@ -25,11 +25,14 @@ static inline int a_ctz_64(uint64_t x)
 
 static inline int a_cas(volatile int *p, int t, int s)
 {
-	__asm__("1:	lwarx %0, 0, %4\n"
+	__asm__("\n"
+		"	sync\n"
+		"1:	lwarx %0, 0, %4\n"
 		"	cmpw %0, %2\n"
 		"	bne 1f\n"
 		"	stwcx. %3, 0, %4\n"
 		"	bne- 1b\n"
+		"	isync\n"
 		"1:	\n"
 		: "=&r"(t), "+m"(*p) : "r"(t), "r"(s), "r"(p) : "cc", "memory" );
         return t;