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author | rofl0r <retnyg@gmx.net> | 2014-01-07 22:43:34 +0100 |
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committer | rofl0r <retnyg@gmx.net> | 2014-02-23 11:07:18 +0100 |
commit | 323272db175204b951f119dae4bd99ef05e20f13 (patch) | |
tree | 70329156d5189294b1e9e7f9c7c326924ad62e35 /arch/x32/syscall_arch.h | |
parent | 0f169cbb79c39a5b15f7a27d9283cdeb6e122b8f (diff) | |
download | musl-323272db175204b951f119dae4bd99ef05e20f13.tar.gz musl-323272db175204b951f119dae4bd99ef05e20f13.tar.xz musl-323272db175204b951f119dae4bd99ef05e20f13.zip |
import vanilla x86_64 code as x32
Diffstat (limited to 'arch/x32/syscall_arch.h')
-rw-r--r-- | arch/x32/syscall_arch.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/x32/syscall_arch.h b/arch/x32/syscall_arch.h new file mode 100644 index 00000000..a85c440c --- /dev/null +++ b/arch/x32/syscall_arch.h @@ -0,0 +1,62 @@ +#define __SYSCALL_LL_E(x) (x) +#define __SYSCALL_LL_O(x) (x) + +static __inline long __syscall0(long n) +{ + unsigned long ret; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n) : "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall1(long n, long a1) +{ + unsigned long ret; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1) : "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall2(long n, long a1, long a2) +{ + unsigned long ret; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2) + : "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall3(long n, long a1, long a2, long a3) +{ + unsigned long ret; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), + "d"(a3) : "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall4(long n, long a1, long a2, long a3, long a4) +{ + unsigned long ret; + register long r10 __asm__("r10") = a4; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), + "d"(a3), "r"(r10): "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5) +{ + unsigned long ret; + register long r10 __asm__("r10") = a4; + register long r8 __asm__("r8") = a5; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), + "d"(a3), "r"(r10), "r"(r8) : "rcx", "r11", "memory"); + return ret; +} + +static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6) +{ + unsigned long ret; + register long r10 __asm__("r10") = a4; + register long r8 __asm__("r8") = a5; + register long r9 __asm__("r9") = a6; + __asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2), + "d"(a3), "r"(r10), "r"(r8), "r"(r9) : "rcx", "r11", "memory"); + return ret; +} |