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| author | Szabolcs Nagy <nsz@port70.net> | 2016-10-09 20:42:02 +0200 |
|---|---|---|
| committer | Rich Felker <dalias@aerifal.cx> | 2016-10-20 01:28:25 -0400 |
| commit | fe39aaae0eafdab3340ea9a4c4b275c3528b4d75 (patch) | |
| tree | 2055dff0982e4ab83e1615c1c8cb50ca1e3e10f7 /arch/sh | |
| parent | 5a05f67599ff06f9255aa4119cfecb85575d6e20 (diff) | |
| download | musl-fe39aaae0eafdab3340ea9a4c4b275c3528b4d75.tar.gz musl-fe39aaae0eafdab3340ea9a4c4b275c3528b4d75.tar.xz musl-fe39aaae0eafdab3340ea9a4c4b275c3528b4d75.zip | |
add bits/hwcap.h and include it in sys/auxv.h
aarch64, arm, mips, mips64, mipsn32, powerpc, powerpc64 and sh have cpu feature bits defined in linux for AT_HWCAP auxv entry, so expose those in sys/auxv.h it seems the mips hwcaps were never exposed to userspace neither by linux nor by glibc, but that's most likely an oversight.
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/bits/hwcap.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/sh/bits/hwcap.h b/arch/sh/bits/hwcap.h new file mode 100644 index 00000000..f85121d0 --- /dev/null +++ b/arch/sh/bits/hwcap.h @@ -0,0 +1,11 @@ +#define CPU_HAS_FPU 0x0001 +#define CPU_HAS_P2_FLUSH_BUG 0x0002 +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 +#define CPU_HAS_DSP 0x0008 +#define CPU_HAS_PERF_COUNTER 0x0010 +#define CPU_HAS_PTEA 0x0020 +#define CPU_HAS_LLSC 0x0040 +#define CPU_HAS_L2_CACHE 0x0080 +#define CPU_HAS_OP32 0x0100 +#define CPU_HAS_PTEAEX 0x0200 +#define CPU_HAS_CAS_L 0x0400 |