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authorRich Felker <dalias@aerifal.cx>2019-07-17 18:50:15 -0400
committerRich Felker <dalias@aerifal.cx>2019-07-17 18:50:15 -0400
commit8eb49e0485fc547eead9e47200bbee6d81f391c1 (patch)
tree393cbf5431a7d053eef7d2a36e031ea8e62421d8 /arch/riscv64
parent1a28c6eade3046e73da0e80bbb7c377f24f514c7 (diff)
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fix riscv64 syscall asm constraint
having "+r"(a0) is redundant with "0"(a0) in syscalls with at least 1
arg, which is arguably a constraint violation (clang treats it as
such), and an invalid input with indeterminate value in the 0-arg
case. use the "=r"(a0) form instead.
Diffstat (limited to 'arch/riscv64')
-rw-r--r--arch/riscv64/syscall_arch.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv64/syscall_arch.h b/arch/riscv64/syscall_arch.h
index 1aaeb631..3e0804ef 100644
--- a/arch/riscv64/syscall_arch.h
+++ b/arch/riscv64/syscall_arch.h
@@ -3,7 +3,7 @@
 
 #define __asm_syscall(...) \
 	__asm__ __volatile__ ("ecall\n\t" \
-	: "+r"(a0) : __VA_ARGS__ : "memory"); \
+	: "=r"(a0) : __VA_ARGS__ : "memory"); \
 	return a0; \
 
 static inline long __syscall0(long n)