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authorRich Felker <dalias@aerifal.cx>2019-09-27 09:57:54 -0400
committerRich Felker <dalias@aerifal.cx>2019-09-27 10:31:37 -0400
commit604f8d3d8b08ee4f548de193050ef93a7753c2e0 (patch)
treee2c3c64a21ff2a7451004280a0cb8de36f814ee2 /arch/mips
parent12fecbb4ec6d310bf9d418839be410367ad9cf21 (diff)
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clean up mips (32-bit, o32) syscall asm constraints
analogous to commit ddc7c4f936c7a90781072f10dbaa122007e939d0 for
mips64 and n32, remove the hack to load the syscall number into $2 via
asm, and use a constraint to let the compiler load it instead.

now, only $4, $5, and $6 are potential input-only registers. $2 is
always input and output, and $7 is both when it's an argument,
otherwise output-only. previously, $7 was treated as an input (with a
"1" constraint matching its output position) even when it was not an
input, which was arguably undefined behavior (asm input from
indeterminate value). this is corrected.

as before, $8, $9, and $10 are conditionally input-output registers
for 5-, 6-, and 7-argument syscalls. their role in input is carrying
in the values that will be stored on the stack for arguments 5-7.
their role in output is carrying back whatever the kernel has
clobbered them with, so that the compiler cannot assume they still
contain the input values.
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/syscall_arch.h63
1 files changed, 32 insertions, 31 deletions
diff --git a/arch/mips/syscall_arch.h b/arch/mips/syscall_arch.h
index 808aa41d..6ea73437 100644
--- a/arch/mips/syscall_arch.h
+++ b/arch/mips/syscall_arch.h
@@ -18,10 +18,11 @@
 static inline long __syscall0(long n)
 {
 	register long r7 __asm__("$7");
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
-		"addu $2,$0,%2 ; syscall"
-		: "=&r"(r2), "=r"(r7) : "ir"(n), "0"(r2), "1"(r7)
+		"syscall"
+		: "+r"(r2), "=r"(r7)
+		:
 		: SYSCALL_CLOBBERLIST, "$8", "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -30,11 +31,11 @@ static inline long __syscall1(long n, long a)
 {
 	register long r4 __asm__("$4") = a;
 	register long r7 __asm__("$7");
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
-		"addu $2,$0,%2 ; syscall"
-		: "=&r"(r2), "=r"(r7) : "ir"(n), "0"(r2), "1"(r7),
-		  "r"(r4)
+		"syscall"
+		: "+r"(r2), "=r"(r7)
+		: "r"(r4)
 		: SYSCALL_CLOBBERLIST, "$8", "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -44,11 +45,11 @@ static inline long __syscall2(long n, long a, long b)
 	register long r4 __asm__("$4") = a;
 	register long r5 __asm__("$5") = b;
 	register long r7 __asm__("$7");
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
-		"addu $2,$0,%2 ; syscall"
-		: "=&r"(r2), "=r"(r7) : "ir"(n), "0"(r2), "1"(r7),
-		  "r"(r4), "r"(r5)
+		"syscall"
+		: "+r"(r2), "=r"(r7)
+		: "r"(r4), "r"(r5)
 		: SYSCALL_CLOBBERLIST, "$8", "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -59,11 +60,11 @@ static inline long __syscall3(long n, long a, long b, long c)
 	register long r5 __asm__("$5") = b;
 	register long r6 __asm__("$6") = c;
 	register long r7 __asm__("$7");
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
-		"addu $2,$0,%2 ; syscall"
-		: "=&r"(r2), "=r"(r7) : "ir"(n), "0"(r2), "1"(r7),
-		  "r"(r4), "r"(r5), "r"(r6)
+		"syscall"
+		: "+r"(r2), "=r"(r7)
+		: "r"(r4), "r"(r5), "r"(r6)
 		: SYSCALL_CLOBBERLIST, "$8", "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -74,11 +75,11 @@ static inline long __syscall4(long n, long a, long b, long c, long d)
 	register long r5 __asm__("$5") = b;
 	register long r6 __asm__("$6") = c;
 	register long r7 __asm__("$7") = d;
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
-		"addu $2,$0,%2 ; syscall"
-		: "=&r"(r2), "=r"(r7) : "ir"(n), "0"(r2), "1"(r7),
-		  "r"(r4), "r"(r5), "r"(r6)
+		"syscall"
+		: "+r"(r2), "+r"(r7)
+		: "r"(r4), "r"(r5), "r"(r6)
 		: SYSCALL_CLOBBERLIST, "$8", "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -90,13 +91,13 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e)
 	register long r6 __asm__("$6") = c;
 	register long r7 __asm__("$7") = d;
 	register long r8 __asm__("$8") = e;
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
 		"subu $sp,$sp,32 ; sw $8,16($sp) ; "
-		"addu $2,$0,%3 ; syscall ;"
+		"syscall ;"
 		"addu $sp,$sp,32"
-		: "=&r"(r2), "=r"(r7), "+r"(r8)
-		: "ir"(n), "0"(r2), "1"(r7), "r"(r4), "r"(r5), "r"(r6)
+		: "+r"(r2), "+r"(r7), "+r"(r8)
+		: "r"(r4), "r"(r5), "r"(r6)
 		: SYSCALL_CLOBBERLIST, "$9", "$10");
 	return r7 ? -r2 : r2;
 }
@@ -109,13 +110,13 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo
 	register long r7 __asm__("$7") = d;
 	register long r8 __asm__("$8") = e;
 	register long r9 __asm__("$9") = f;
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
 		"subu $sp,$sp,32 ; sw $8,16($sp) ; sw $9,20($sp) ; "
-		"addu $2,$0,%4 ; syscall ;"
+		"syscall ;"
 		"addu $sp,$sp,32"
-		: "=&r"(r2), "=r"(r7), "+r"(r8), "+r"(r9)
-		: "ir"(n), "0"(r2), "1"(r7), "r"(r4), "r"(r5), "r"(r6)
+		: "+r"(r2), "+r"(r7), "+r"(r8), "+r"(r9)
+		: "r"(r4), "r"(r5), "r"(r6)
 		: SYSCALL_CLOBBERLIST, "$10");
 	return r7 ? -r2 : r2;
 }
@@ -129,13 +130,13 @@ static inline long __syscall7(long n, long a, long b, long c, long d, long e, lo
 	register long r8 __asm__("$8") = e;
 	register long r9 __asm__("$9") = f;
 	register long r10 __asm__("$10") = g;
-	register long r2 __asm__("$2");
+	register long r2 __asm__("$2") = n;
 	__asm__ __volatile__ (
 		"subu $sp,$sp,32 ; sw $8,16($sp) ; sw $9,20($sp) ; sw $10,24($sp) ; "
-		"addu $2,$0,%5 ; syscall ;"
+		"syscall ;"
 		"addu $sp,$sp,32"
-		: "=&r"(r2), "=r"(r7), "+r"(r8), "+r"(r9), "+r"(r10)
-		: "ir"(n), "0"(r2), "1"(r7), "r"(r4), "r"(r5), "r"(r6)
+		: "+r"(r2), "+r"(r7), "+r"(r8), "+r"(r9), "+r"(r10)
+		: "r"(r4), "r"(r5), "r"(r6)
 		: SYSCALL_CLOBBERLIST);
 	return r7 ? -r2 : r2;
 }