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authorRich Felker <dalias@aerifal.cx>2019-09-26 19:14:36 -0400
committerRich Felker <dalias@aerifal.cx>2019-09-26 19:14:36 -0400
commit9f6dd78593e1d3b06f6e72f8479c91361e28ac28 (patch)
treeaa6fb50dd9eb2a74e0cf0c23bf00ef28765cfa07 /arch/mips64
parentb678f7b46a614ca8985b3ef662d96036e06e8810 (diff)
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fix mips r6 syscall clobber lists not to include hi/lo registers
mips r6 (an incompatible isa from traditional mips) removes the hi and
lo registers used for mul/div results. older gcc versions accepted
them in the clobber list for asm, but their presence is incorrect and
breaks on later versions.

in the process of fixing this, the clobber list for 32-bit mips
syscalls has been deduplicated via a macro like on mips64 and n32.
Diffstat (limited to 'arch/mips64')
-rw-r--r--arch/mips64/syscall_arch.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips64/syscall_arch.h b/arch/mips64/syscall_arch.h
index 013908dd..69c429b8 100644
--- a/arch/mips64/syscall_arch.h
+++ b/arch/mips64/syscall_arch.h
@@ -3,9 +3,15 @@
 
 #define SYSCALL_RLIM_INFINITY (-1UL/2)
 
+#if __mips_isa_rev >= 6
+#define SYSCALL_CLOBBERLIST \
+	"$1", "$3", "$10", "$11", "$12", "$13", \
+	"$14", "$15", "$24", "$25", "memory"
+#else
 #define SYSCALL_CLOBBERLIST \
 	"$1", "$3", "$10", "$11", "$12", "$13", \
 	"$14", "$15", "$24", "$25", "hi", "lo", "memory"
+#endif
 
 static inline long __syscall0(long n)
 {