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author | Rich Felker <dalias@aerifal.cx> | 2014-08-25 15:43:40 -0400 |
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committer | Rich Felker <dalias@aerifal.cx> | 2014-08-25 15:43:40 -0400 |
commit | ea818ea8340c13742a4f41e6077f732291aea4bc (patch) | |
tree | f2a97e8f8a25fc3337002aa30bb235575593af86 /arch/microblaze/bits/ipc.h | |
parent | 5345c9b884e7c4e73eb2c8bb83b8d0df20f95afb (diff) | |
download | musl-ea818ea8340c13742a4f41e6077f732291aea4bc.tar.gz musl-ea818ea8340c13742a4f41e6077f732291aea4bc.tar.xz musl-ea818ea8340c13742a4f41e6077f732291aea4bc.zip |
add working a_spin() atomic for non-x86 targets
conceptually, a_spin needs to be at least a compiler barrier, so the compiler will not optimize out loops (and the load on each iteration) while spinning. it should also be a memory barrier, or the spinning thread might keep spinning without noticing stores from other threads, thus delaying for longer than it should. ideally, an optimal a_spin implementation that avoids unnecessary cache/memory contention should be chosen for each arch, but for now, the easiest thing is to perform a useless a_cas on the calling thread's stack.
Diffstat (limited to 'arch/microblaze/bits/ipc.h')
0 files changed, 0 insertions, 0 deletions