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author | Rich Felker <dalias@aerifal.cx> | 2013-08-16 12:30:37 -0400 |
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committer | Rich Felker <dalias@aerifal.cx> | 2013-08-16 12:30:37 -0400 |
commit | 7318c62e6439fca75ca3d50ddf0bd81a151c2766 (patch) | |
tree | 789578e9c4af6aedc50bcbde364dc180580e6de0 | |
parent | 0a4a4a7a11db93c39960feea96ec9dbed969a44e (diff) | |
download | musl-7318c62e6439fca75ca3d50ddf0bd81a151c2766.tar.gz musl-7318c62e6439fca75ca3d50ddf0bd81a151c2766.tar.xz musl-7318c62e6439fca75ca3d50ddf0bd81a151c2766.zip |
support floating point environment (fenv) on armhf (hard float) subarchs
patch by nsz. I've tested it on an armhf machine and it seems to be working correctly.
-rw-r--r-- | arch/arm/bits/fenv.h | 13 | ||||
-rw-r--r-- | src/fenv/armebhf/fenv.sub | 1 | ||||
-rw-r--r-- | src/fenv/armhf/fenv.s | 60 | ||||
-rw-r--r-- | src/fenv/armhf/fenv.sub | 1 |
4 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/bits/fenv.h b/arch/arm/bits/fenv.h index edbdea2a..1d990221 100644 --- a/arch/arm/bits/fenv.h +++ b/arch/arm/bits/fenv.h @@ -1,5 +1,18 @@ +#ifdef __SOFTFP__ #define FE_ALL_EXCEPT 0 #define FE_TONEAREST 0 +#else +#define FE_INVALID 1 +#define FE_DIVBYZERO 2 +#define FE_OVERFLOW 4 +#define FE_UNDERFLOW 8 +#define FE_INEXACT 16 +#define FE_ALL_EXCEPT 31 +#define FE_TONEAREST 0 +#define FE_DOWNWARD 0x800000 +#define FE_UPWARD 0x400000 +#define FE_TOWARDZERO 0xc00000 +#endif typedef unsigned long fexcept_t; diff --git a/src/fenv/armebhf/fenv.sub b/src/fenv/armebhf/fenv.sub new file mode 100644 index 00000000..5281e40b --- /dev/null +++ b/src/fenv/armebhf/fenv.sub @@ -0,0 +1 @@ +../armhf/fenv.s diff --git a/src/fenv/armhf/fenv.s b/src/fenv/armhf/fenv.s new file mode 100644 index 00000000..ee81b3d5 --- /dev/null +++ b/src/fenv/armhf/fenv.s @@ -0,0 +1,60 @@ +.global fegetround +.type fegetround,%function +fegetround: + mrc p10, 7, r0, cr1, cr0, 0 + and r0, r0, #0xc00000 + bx lr + +.global fesetround +.type fesetround,%function +fesetround: + mrc p10, 7, r3, cr1, cr0, 0 + bic r3, r3, #0xc00000 + orr r3, r3, r0 + mcr p10, 7, r3, cr1, cr0, 0 + mov r0, #0 + bx lr + +.global fetestexcept +.type fetestexcept,%function +fetestexcept: + mrc p10, 7, r3, cr1, cr0, 0 + and r0, r0, r3 + bx lr + +.global feclearexcept +.type feclearexcept,%function +feclearexcept: + mrc p10, 7, r3, cr1, cr0, 0 + bic r3, r3, r0 + mcr p10, 7, r3, cr1, cr0, 0 + mov r0, #0 + bx lr + +.global feraiseexcept +.type feraiseexcept,%function +feraiseexcept: + mrc p10, 7, r3, cr1, cr0, 0 + orr r3, r3, r0 + mcr p10, 7, r3, cr1, cr0, 0 + mov r0, #0 + bx lr + +.global fegetenv +.type fegetenv,%function +fegetenv: + mrc p10, 7, r3, cr1, cr0, 0 + str r3, [r0] + mov r0, #0 + bx lr + +.global fesetenv +.type fesetenv,%function +fesetenv: + mrc p10, 7, r3, cr1, cr0, 0 + cmn r0, #1 + moveq r3, #0 + ldrne r3, [r0] + mcr p10, 7, r3, cr1, cr0, 0 + mov r0, #0 + bx lr diff --git a/src/fenv/armhf/fenv.sub b/src/fenv/armhf/fenv.sub new file mode 100644 index 00000000..ec559cd4 --- /dev/null +++ b/src/fenv/armhf/fenv.sub @@ -0,0 +1 @@ +fenv.s |