blob: 0cbfdd0e39d7ceae97669ccff6459774232a54a1 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
|
ifeq ($(subdir),misc)
# <sys/reg.h> provides something like x86 compatibility.
# New code should probably use <arch/abi.h> instead.
sysdep_headers += sys/reg.h
# MIPS-style cacheflush routine
sysdep_headers += sys/cachectl.h
sysdep_routines += cacheflush
# Control dataplane properties of current thread.
sysdep_headers += sys/dataplane.h
sysdep_routines += set_dataplane
endif
|