1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
|
/* Atomic operations. PowerPC Common version.
Copyright (C) 2003-2023 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
/*
* Never include sysdeps/powerpc/atomic-machine.h directly.
* Alway use include/atomic.h which will include either
* sysdeps/powerpc/powerpc32/atomic-machine.h
* or
* sysdeps/powerpc/powerpc64/atomic-machine.h
* as appropriate and which in turn include this file.
*/
/*
* Powerpc does not have byte and halfword forms of load and reserve and
* store conditional. So for powerpc we stub out the 8- and 16-bit forms.
*/
#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
(abort (), 0)
#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
(abort (), 0)
#define __ARCH_ACQ_INSTR "isync"
#ifndef __ARCH_REL_INSTR
# define __ARCH_REL_INSTR "sync"
#endif
#ifndef MUTEX_HINT_ACQ
# define MUTEX_HINT_ACQ
#endif
#ifndef MUTEX_HINT_REL
# define MUTEX_HINT_REL
#endif
#define atomic_full_barrier() __asm ("sync" ::: "memory")
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
({ \
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile ( \
"1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
" cmpw %0,%2\n" \
" bne 2f\n" \
" stwcx. %3,0,%1\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
: "=&r" (__tmp) \
: "b" (__memp), "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
#define __arch_compare_and_exchange_val_32_rel(mem, newval, oldval) \
({ \
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile (__ARCH_REL_INSTR "\n" \
"1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
" cmpw %0,%2\n" \
" bne 2f\n" \
" stwcx. %3,0,%1\n" \
" bne- 1b\n" \
"2: " \
: "=&r" (__tmp) \
: "b" (__memp), "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
#define __arch_atomic_exchange_32_acq(mem, value) \
({ \
__typeof (*mem) __val; \
__asm __volatile ( \
"1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
" stwcx. %3,0,%2\n" \
" bne- 1b\n" \
" " __ARCH_ACQ_INSTR \
: "=&r" (__val), "=m" (*mem) \
: "b" (mem), "r" (value), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_exchange_32_rel(mem, value) \
({ \
__typeof (*mem) __val; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
"1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
" stwcx. %3,0,%2\n" \
" bne- 1b" \
: "=&r" (__val), "=m" (*mem) \
: "b" (mem), "r" (value), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_exchange_and_add_32(mem, value) \
({ \
__typeof (*mem) __val, __tmp; \
__asm __volatile ("1: lwarx %0,0,%3\n" \
" add %1,%0,%4\n" \
" stwcx. %1,0,%3\n" \
" bne- 1b" \
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
: "b" (mem), "r" (value), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_exchange_and_add_32_acq(mem, value) \
({ \
__typeof (*mem) __val, __tmp; \
__asm __volatile ("1: lwarx %0,0,%3" MUTEX_HINT_ACQ "\n" \
" add %1,%0,%4\n" \
" stwcx. %1,0,%3\n" \
" bne- 1b\n" \
__ARCH_ACQ_INSTR \
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
: "b" (mem), "r" (value), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_exchange_and_add_32_rel(mem, value) \
({ \
__typeof (*mem) __val, __tmp; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
"1: lwarx %0,0,%3" MUTEX_HINT_REL "\n" \
" add %1,%0,%4\n" \
" stwcx. %1,0,%3\n" \
" bne- 1b" \
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
: "b" (mem), "r" (value), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_increment_val_32(mem) \
({ \
__typeof (*(mem)) __val; \
__asm __volatile ("1: lwarx %0,0,%2\n" \
" addi %0,%0,1\n" \
" stwcx. %0,0,%2\n" \
" bne- 1b" \
: "=&b" (__val), "=m" (*mem) \
: "b" (mem), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_decrement_val_32(mem) \
({ \
__typeof (*(mem)) __val; \
__asm __volatile ("1: lwarx %0,0,%2\n" \
" subi %0,%0,1\n" \
" stwcx. %0,0,%2\n" \
" bne- 1b" \
: "=&b" (__val), "=m" (*mem) \
: "b" (mem), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_decrement_if_positive_32(mem) \
({ int __val, __tmp; \
__asm __volatile ("1: lwarx %0,0,%3\n" \
" cmpwi 0,%0,0\n" \
" addi %1,%0,-1\n" \
" ble 2f\n" \
" stwcx. %1,0,%3\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
: "b" (mem), "m" (*mem) \
: "cr0", "memory"); \
__val; \
})
#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_compare_and_exchange_val_32_acq(mem, newval, oldval); \
else if (sizeof (*mem) == 8) \
__result = __arch_compare_and_exchange_val_64_acq(mem, newval, oldval); \
else \
abort (); \
__result; \
})
#define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_compare_and_exchange_val_32_rel(mem, newval, oldval); \
else if (sizeof (*mem) == 8) \
__result = __arch_compare_and_exchange_val_64_rel(mem, newval, oldval); \
else \
abort (); \
__result; \
})
#define atomic_exchange_acq(mem, value) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_exchange_32_acq (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_64_acq (mem, value); \
else \
abort (); \
__result; \
})
#define atomic_exchange_rel(mem, value) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_exchange_32_rel (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_64_rel (mem, value); \
else \
abort (); \
__result; \
})
#define atomic_exchange_and_add(mem, value) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_exchange_and_add_32 (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_and_add_64 (mem, value); \
else \
abort (); \
__result; \
})
#define atomic_exchange_and_add_acq(mem, value) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_exchange_and_add_32_acq (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_and_add_64_acq (mem, value); \
else \
abort (); \
__result; \
})
#define atomic_exchange_and_add_rel(mem, value) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_exchange_and_add_32_rel (mem, value); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_exchange_and_add_64_rel (mem, value); \
else \
abort (); \
__result; \
})
#define atomic_increment_val(mem) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*(mem)) == 4) \
__result = __arch_atomic_increment_val_32 (mem); \
else if (sizeof (*(mem)) == 8) \
__result = __arch_atomic_increment_val_64 (mem); \
else \
abort (); \
__result; \
})
#define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; })
#define atomic_decrement_val(mem) \
({ \
__typeof (*(mem)) __result; \
if (sizeof (*(mem)) == 4) \
__result = __arch_atomic_decrement_val_32 (mem); \
else if (sizeof (*(mem)) == 8) \
__result = __arch_atomic_decrement_val_64 (mem); \
else \
abort (); \
__result; \
})
#define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; })
/* Decrement *MEM if it is > 0, and return the old value. */
#define atomic_decrement_if_positive(mem) \
({ __typeof (*(mem)) __result; \
if (sizeof (*mem) == 4) \
__result = __arch_atomic_decrement_if_positive_32 (mem); \
else if (sizeof (*mem) == 8) \
__result = __arch_atomic_decrement_if_positive_64 (mem); \
else \
abort (); \
__result; \
})
|
