From d116b7c414c8239b677e341ac517745db689ac2d Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Fri, 24 May 2013 13:29:30 -0500 Subject: PowerPC: Program Priority Register support This patch add inline functions to change the Program Priority Register from ISA 2.05. --- sysdeps/powerpc/sys/platform/ppc.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'sysdeps') diff --git a/sysdeps/powerpc/sys/platform/ppc.h b/sysdeps/powerpc/sys/platform/ppc.h index 833f3d8480..81f3bf9bff 100644 --- a/sysdeps/powerpc/sys/platform/ppc.h +++ b/sysdeps/powerpc/sys/platform/ppc.h @@ -82,4 +82,34 @@ __ppc_mdoom (void) __asm__ volatile ("or 30,30,30"); } + +/* ISA 2.05 and beyond support the Program Priority Register (PPR) to adjust + thread priorities based on lock acquisition, wait and release. The ISA + defines the use of form 'or Rx,Rx,Rx' as the way to modify the PRI field. + The unprivileged priorities are: + Rx = 1 (low) + Rx = 2 (medium) + Rx = 6 (medium-low/normal) + The 'or' instruction form is a nop in previous hardware, so it is safe to + use unguarded. The default value is 'medium'. + */ + +static inline void +__ppc_set_ppr_med (void) +{ + __asm__ volatile ("or 2,2,2"); +} + +static inline void +__ppc_set_ppr_med_low (void) +{ + __asm__ volatile ("or 6,6,6"); +} + +static inline void +__ppc_set_ppr_low (void) +{ + __asm__ volatile ("or 1,1,1"); +} + #endif /* sys/platform/ppc.h */ -- cgit 1.4.1