From 3f241d758415e050269ebd9b3b909f3d007f89e5 Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Wed, 24 Jun 2009 11:36:57 -0700 Subject: Fix cfa offset for saved registers in PPC sqrt implementations. --- sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S | 4 ++-- sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S | 4 ++-- sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S | 4 ++-- sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) (limited to 'sysdeps') diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S index 6aef4e301b..95a0b3915d 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S @@ -60,8 +60,8 @@ EALIGN (__sqrt, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S index e5b8b9d565..c31555194b 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S @@ -60,8 +60,8 @@ EALIGN (__sqrtf, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S index 925930bf77..105b5912a1 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S @@ -60,8 +60,8 @@ EALIGN (__sqrt, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S index 891e69c9c0..14bc0a2ceb 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S @@ -60,8 +60,8 @@ EALIGN (__sqrtf, 5, 0) fmr fp12,fp2 stw r0,20(r1) stw r30,8(r1) - cfi_offset(lr,20) - cfi_offset(r30,8) + cfi_offset(lr,20-16) + cfi_offset(r30,8-16) #ifdef SHARED # ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 -- cgit 1.4.1