From e682d0157854955e4b5fc91731d24a854e810eee Mon Sep 17 00:00:00 2001 From: Sunil K Pandey Date: Wed, 29 Dec 2021 10:07:02 -0800 Subject: x86-64: Add vector asinh/asinhf implementation to libmvec Implement vectorized asinh/asinhf containing SSE, AVX, AVX2 and AVX512 versions for libmvec as per vector ABI. It also contains accuracy and ABI tests for vector asinh/asinhf with regenerated ulps. Reviewed-by: H.J. Lu --- sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c | 1 + 1 file changed, 1 insertion(+) (limited to 'sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c') diff --git a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c index abbebf9993..e8ab1885a7 100644 --- a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c +++ b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c @@ -45,6 +45,7 @@ VECTOR_WRAPPER (WRAPPER_NAME (atanhf), _ZGVeN16v_atanhf) VECTOR_WRAPPER (WRAPPER_NAME (acoshf), _ZGVeN16v_acoshf) VECTOR_WRAPPER (WRAPPER_NAME (erff), _ZGVeN16v_erff) VECTOR_WRAPPER (WRAPPER_NAME (tanhf), _ZGVeN16v_tanhf) +VECTOR_WRAPPER (WRAPPER_NAME (asinhf), _ZGVeN16v_asinhf) #define VEC_INT_TYPE __m512i -- cgit 1.4.1