From 11c01de14c879ffc8dbac8ce32242a7552cbd4ad Mon Sep 17 00:00:00 2001 From: Sunil K Pandey Date: Wed, 29 Dec 2021 08:29:26 -0800 Subject: x86-64: Add vector asin/asinf implementation to libmvec Implement vectorized asin/asinf containing SSE, AVX, AVX2 and AVX512 versions for libmvec as per vector ABI. It also contains accuracy and ABI tests for vector asin/asinf with regenerated ulps. Reviewed-by: H.J. Lu --- sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c | 1 + 1 file changed, 1 insertion(+) (limited to 'sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c') diff --git a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c index af769c56fa..3d3218a310 100644 --- a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c +++ b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c @@ -29,6 +29,7 @@ VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVeN16v_expf) VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVeN16vv_powf) VECTOR_WRAPPER (WRAPPER_NAME (acosf), _ZGVeN16v_acosf) VECTOR_WRAPPER (WRAPPER_NAME (atanf), _ZGVeN16v_atanf) +VECTOR_WRAPPER (WRAPPER_NAME (asinf), _ZGVeN16v_asinf) #define VEC_INT_TYPE __m512i -- cgit 1.4.1