From 406f28dbe5f8fc70fed76a2fe0112983417ebf60 Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Wed, 17 Oct 2007 15:58:16 +0000 Subject: * sysdeps/x86_64/cacheinfo.c: Comment out code added in support of new memset. too high for the improvements. Implement bzero unconditionally for use in libc. --- sysdeps/x86_64/cacheinfo.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'sysdeps/x86_64/cacheinfo.c') diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c index 114ec673d3..83e7b3c60b 100644 --- a/sysdeps/x86_64/cacheinfo.c +++ b/sysdeps/x86_64/cacheinfo.c @@ -404,10 +404,13 @@ long int __x86_64_data_cache_size_half attribute_hidden = 32 * 1024 / 2; /* Shared cache size for use in memory and string routines, typically L2 or L3 size. */ long int __x86_64_shared_cache_size_half attribute_hidden = 1024 * 1024 / 2; +#ifdef NOT_USED_RIGHT_NOW long int __x86_64_shared_cache_size attribute_hidden = 1024 * 1024; +#endif /* PREFETCHW support flag for use in memory and string routines. */ int __x86_64_prefetchw attribute_hidden; +#ifdef NOT_USED_RIGHT_NOW /* Instructions preferred for memory and string routines. 0: Regular instructions @@ -417,6 +420,7 @@ int __x86_64_prefetchw attribute_hidden; */ int __x86_64_preferred_memory_instruction attribute_hidden; +#endif static void @@ -459,12 +463,14 @@ init_cacheinfo (void) : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "0" (1)); +#ifdef NOT_USED_RIGHT_NOW /* Intel prefers SSSE3 instructions for memory/string rountines if they are avaiable. */ if ((ecx & 0x200)) __x86_64_preferred_memory_instruction = 3; else __x86_64_preferred_memory_instruction = 2; +#endif /* Figure out the number of logical threads that share the highest cache level. */ @@ -570,6 +576,8 @@ init_cacheinfo (void) if (shared > 0) { __x86_64_shared_cache_size_half = shared / 2; +#ifdef NOT_USED_RIGHT_NOW __x86_64_shared_cache_size = shared; +#endif } } -- cgit 1.4.1