From 578d080544d77daad68dd697e77f2dcff50c6c7b Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Mon, 7 Dec 2015 23:07:17 +0100 Subject: mips: fix testsuite build for O32 FPXX ABI on pre-R2 CPU On MIPS when the toolchain is using the O32 FPXX ABI, the testsuite fails to build for pre-R2 CPU. It assumes that it is possible to use the -mfp64 option to build tst-abi-fp64amod and tst-abi-fp64mod, while this requires a CPU which supports the mfhc1 and mthc1 instructions, ie at least a R2 CPU: error: '-mgp32' and '-mfp64' can only be combined if the target supports the mfhc1 and mthc1 instructions The same way it assumes that it is possible to use the -modd-spreg option to build tst-abi-fpxxomod and tst-abi-fp64mod, while this requires at least a R1 CPU: warning: the 'mips2' architecture does not support odd single-precision registers This patches changes that by checking the usability of -mfp64 and -modd-spreg options in configure, and disable those tests when they can not be used. --- sysdeps/unix/sysv/linux/mips/configure | 27 +++++++++++++++++++++++++++ sysdeps/unix/sysv/linux/mips/configure.ac | 7 +++++++ 2 files changed, 34 insertions(+) (limited to 'sysdeps/unix/sysv/linux') diff --git a/sysdeps/unix/sysv/linux/mips/configure b/sysdeps/unix/sysv/linux/mips/configure index 2d79f55335..dee56aa6fe 100644 --- a/sysdeps/unix/sysv/linux/mips/configure +++ b/sysdeps/unix/sysv/linux/mips/configure @@ -106,6 +106,8 @@ if test -z "$libc_mips_float"; then fi libc_mips_o32_fp= +libc_cv_mips_fp64= +libc_cv_mips_modd_spreg= if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then cat confdefs.h - <<_ACEOF >conftest.$ac_ext @@ -219,9 +221,34 @@ fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + + if { ac_try='${CC-cc} -mfp64 -xc /dev/null -S -o /dev/null' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then : + libc_cv_mips_fp64=yes +else + libc_cv_mips_fp64=no +fi + if { ac_try='${CC-cc} -Werror -modd-spreg -xc /dev/null -S -o /dev/null' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then : + libc_cv_mips_modd_spreg=yes +else + libc_cv_mips_modd_spreg=no +fi fi config_vars="$config_vars o32-fpabi = ${libc_mips_o32_fp}" +config_vars="$config_vars +has-mpf64 = ${libc_cv_mips_fp64}" +config_vars="$config_vars +has-modd-spreg = ${libc_cv_mips_modd_spreg}" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ diff --git a/sysdeps/unix/sysv/linux/mips/configure.ac b/sysdeps/unix/sysv/linux/mips/configure.ac index 5039ec969f..45147c5e43 100644 --- a/sysdeps/unix/sysv/linux/mips/configure.ac +++ b/sysdeps/unix/sysv/linux/mips/configure.ac @@ -45,6 +45,8 @@ if test -z "$libc_mips_float"; then fi libc_mips_o32_fp= +libc_cv_mips_fp64= +libc_cv_mips_modd_spreg= if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then AC_COMPILE_IFELSE( @@ -84,8 +86,13 @@ if test x"$libc_mips_abi" = xo32 -a x"$libc_mips_float" = xhard; then [libc_mips_o32_fp=64], [])])])])])], []) + + LIBC_TRY_CC_OPTION([-mfp64], [libc_cv_mips_fp64=yes], [libc_cv_mips_fp64=no]) + LIBC_TRY_CC_OPTION([-Werror -modd-spreg], [libc_cv_mips_modd_spreg=yes], [libc_cv_mips_modd_spreg=no]) fi LIBC_CONFIG_VAR([o32-fpabi],[${libc_mips_o32_fp}]) +LIBC_CONFIG_VAR([has-mpf64],[${libc_cv_mips_fp64}]) +LIBC_CONFIG_VAR([has-modd-spreg],[${libc_cv_mips_modd_spreg}]) AC_COMPILE_IFELSE( [AC_LANG_PROGRAM([ -- cgit 1.4.1