From 72dfddeffcc993a726bdcbe5e515afa1180095e8 Mon Sep 17 00:00:00 2001 From: Zong Li Date: Fri, 30 Nov 2018 17:18:00 +0800 Subject: RISC-V: Build infrastructure for 32-bit port This patch lays out the top-level organisation of the RISC-V 32-bit port. It provides all the Implies files as well as various other fragments of the build infrastructure. Reviewed-by: Maciej W. Rozycki --- sysdeps/riscv/preconfigure | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'sysdeps/riscv/preconfigure') diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure index d9adb31b64..1ab5d20f0e 100644 --- a/sysdeps/riscv/preconfigure +++ b/sysdeps/riscv/preconfigure @@ -6,11 +6,7 @@ riscv*) atomic=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_atomic' | cut -d' ' -f2` case "$xlen" in - 32) - echo "glibc does not yet support 32-bit systems" >&2 - exit 1 - ;; - 64) + 64 | 32) ;; *) echo "Unable to determine XLEN" >&2 -- cgit 1.4.1