From 67236aeb6e27bb6c975727f119e4b4f89e416706 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Mon, 29 Jan 2018 10:26:35 -0800 Subject: RISC-V: Generic and soft-fp Routines This patch contains the miscellaneous math routines and headers we have implemented for RISC-V. This includes things from that aren't completely ISA-generic, floating-point bit manipulation, and soft-fp hooks. 2018-01-29 Palmer Dabbelt * sysdeps/riscv/bits/fenv.h: New file. * sysdeps/riscv/e_sqrtl.c: Likewise. * sysdeps/riscv/fpu_control.h: Likewise. * sysdeps/riscv/math-tests.h: Likewise. * sysdeps/riscv/nofpu/Implies: Likewise. * sysdeps/riscv/sfp-machine.h: Likewise. * sysdeps/riscv/tininess.h: Likewise. --- sysdeps/riscv/nofpu/Implies | 1 + 1 file changed, 1 insertion(+) create mode 100644 sysdeps/riscv/nofpu/Implies (limited to 'sysdeps/riscv/nofpu') diff --git a/sysdeps/riscv/nofpu/Implies b/sysdeps/riscv/nofpu/Implies new file mode 100644 index 0000000000..abcbadb25f --- /dev/null +++ b/sysdeps/riscv/nofpu/Implies @@ -0,0 +1 @@ +ieee754/soft-fp -- cgit 1.4.1