From 487972aea52004f604c2878c8c9d3e77670f2c32 Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Thu, 27 Feb 2014 09:43:51 -0600 Subject: PowerPC: Optimized isnan/isnanf for POWER8 This patch add a optimized isnan/isnanf implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move. --- sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h | 1 + 1 file changed, 1 insertion(+) (limited to 'sysdeps/powerpc/powerpc32/power4/multiarch') diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h index 51a34f2588..72d720d55a 100644 --- a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h +++ b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h @@ -36,6 +36,7 @@ and fills the previous ones. */ #define INIT_ARCH() \ unsigned long int hwcap = __GLRO(dl_hwcap); \ + unsigned long int __attribute__((unused)) hwcap2 = __GLRO(dl_hwcap2); \ if (hwcap & PPC_FEATURE_ARCH_2_06) \ hwcap |= PPC_FEATURE_ARCH_2_05 | \ PPC_FEATURE_POWER5_PLUS | \ -- cgit 1.4.1