From 0ecb606cb6cf65de1d9fc8a919bceb4be476c602 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 12 Jul 2007 18:26:36 +0000 Subject: 2.5-18.1 --- sysdeps/ia64/fpu/s_rintl.S | 289 +++++++++++++++++++++------------------------ 1 file changed, 133 insertions(+), 156 deletions(-) (limited to 'sysdeps/ia64/fpu/s_rintl.S') diff --git a/sysdeps/ia64/fpu/s_rintl.S b/sysdeps/ia64/fpu/s_rintl.S index 857e8d5208..b5402149ec 100644 --- a/sysdeps/ia64/fpu/s_rintl.S +++ b/sysdeps/ia64/fpu/s_rintl.S @@ -1,10 +1,10 @@ .file "rintl.s" -// Copyright (C) 2000, 2001, Intel Corporation + +// Copyright (c) 2000 - 2003, Intel Corporation // All rights reserved. -// -// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story, -// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation. +// +// Contributed 2000 by the Intel Numerics Group, Intel Corporation // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are @@ -20,76 +20,68 @@ // * The name of Intel Corporation may not be used to endorse or promote // products derived from this software without specific prior written // permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, -// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING -// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// // Intel Corporation is the author of this code, and requests that all -// problem reports or change requests be submitted to it directly at -// http://developer.intel.com/opensource. +// problem reports or change requests be submitted to it directly at +// http://www.intel.com/software/products/opensource/libraries/num.htm. // // History //============================================================== -// 2/02/00: Initial version -// 5/24/00 Fixed case of 2^63 - 1 + 0.5 (0x1007dffffffffffffffff) -// 2/08/01 Corrected behavior for all rounding modes. -// +// 02/02/00 Initial version +// 02/08/01 Corrected behavior for all rounding modes. +// 05/20/02 Cleaned up namespace and sf0 syntax +// 01/20/03 Improved performance +//============================================================== + // API //============================================================== // long double rintl(long double x) +//============================================================== -#include "libm_support.h" - -// -// general registers used: -// -rint_GR_FFFF = r14 -rint_GR_signexp = r15 -rint_GR_exponent = r16 -rint_GR_17ones = r17 -rint_GR_10033 = r18 -rint_GR_fpsr = r19 -rint_GR_rcs0 = r20 -rint_GR_rcs0_mask = r21 +// general input registers: +// r14 - r21 +rSignexp = r14 +rExp = r15 +rExpMask = r16 +rBigexp = r17 +rM1 = r18 +rFpsr = r19 +rRcs0 = r20 +rRcs0Mask = r21 -// predicate registers used: -// p6-11 +// floating-point registers: +// f8 - f11 -// floating-point registers used: +fXInt = f9 +fNormX = f10 +fTmp = f11 -RINT_NORM_f8 = f9 -RINT_FFFF = f10 -RINT_INEXACT = f11 -RINT_FLOAT_INT_f8 = f12 -RINT_INT_f8 = f13 -RINT_SIGNED_FLOAT_INT_f8 = f14 +// predicate registers used: +// p6 - p10 // Overview of operation //============================================================== - // long double rintl(long double x) -// Return an integer value (represented as a long double) that is x rounded to integer in current -// rounding mode -// Inexact is set if x != rintl(x) -// ******************************************************************************* - -// Set denormal flag for denormal input and -// and take denormal fault if necessary. - -// Is the input an integer value already? +// Return an integer value (represented as a long double) that is x +// rounded to integer in current rounding mode +// Inexact is set if x != rint(x) +//============================================================== // double_extended -// if the exponent is >= 1003e => 3F(true) = 63(decimal) +// if the exponent is > 1003e => 3F(true) = 63(decimal) // we have a significand of 64 bits 1.63-bits. // If we multiply by 2^63, we no longer have a fractional part // So input is an integer value already. @@ -102,151 +94,136 @@ RINT_SIGNED_FLOAT_INT_f8 = f14 // So input is an integer value already. // single -// if the exponent is >= 10016 => 17(true) = 23(decimal) -// we have a significand of 53 bits 1.52-bits. (implicit 1) -// If we multiply by 2^52, we no longer have a fractional part +// if the exponent is > 10016 => 17(true) = 23(decimal) +// we have a significand of 24 bits 1.23-bits. (implicit 1) +// If we multiply by 2^23, we no longer have a fractional part // So input is an integer value already. -// If x is NAN, ZERO, or INFINITY, then return - -// qnan snan inf norm unorm 0 -+ -// 1 1 1 0 0 1 11 0xe7 - - -.align 32 -.global rintl# - .section .text -.proc rintl# -.align 32 - - -rintl: -#ifdef _LIBC -.global __rintl -.type __rintl,@function -__rintl: -#endif +GLOBAL_IEEE754_ENTRY(rintl) { .mfi - mov rint_GR_fpsr = ar40 // Read the fpsr--need to check rc.s0 - fcvt.fx.s1 RINT_INT_f8 = f8 - addl rint_GR_10033 = 0x1003e, r0 + getf.exp rSignexp = f8 // Get signexp, recompute if unorm + fclass.m p7,p0 = f8, 0x0b // Test x unorm + addl rBigexp = 0x1003e, r0 // Set exponent at which is integer } { .mfi - mov rint_GR_FFFF = -1 - fnorm.s1 RINT_NORM_f8 = f8 - mov rint_GR_17ones = 0x1FFFF -;; + mov rM1 = -1 // Set all ones + fcvt.fx.s1 fXInt = f8 // Convert to int in significand + mov rExpMask = 0x1FFFF // Form exponent mask } +;; { .mfi - setf.sig RINT_FFFF = rint_GR_FFFF - fclass.m.unc p6,p0 = f8, 0xe7 - mov rint_GR_rcs0_mask = 0x0c00 -;; + mov rFpsr = ar40 // Read fpsr -- check rc.s0 + fclass.m p6,p0 = f8, 0x1e3 // Test x natval, nan, inf + nop.i 0 } - { .mfb - nop.m 999 -(p6) fnorm f8 = f8 -(p6) br.ret.spnt b0 // Exit if x nan, inf, zero -;; + setf.sig fTmp = rM1 // Make const for setting inexact + fnorm.s1 fNormX = f8 // Normalize input +(p7) br.cond.spnt RINT_UNORM // Branch if x unorm } - -{ .mfi - nop.m 999 - fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 - nop.i 999 ;; + + +RINT_COMMON: +// Return here from RINT_UNORM +{ .mfb + and rExp = rSignexp, rExpMask // Get biased exponent +(p6) fma.s0 f8 = f8, f1, f0 // Result if x natval, nan, inf +(p6) br.ret.spnt b0 // Exit if x natval, nan, inf } +;; { .mfi - getf.exp rint_GR_signexp = RINT_NORM_f8 - fcmp.eq.s0 p8,p0 = f8,f0 // Dummy op to set denormal - nop.i 999 -;; + mov rRcs0Mask = 0x0c00 // Mask for rc.s0 + fcvt.xf f8 = fXInt // Result assume |x| < 2^63 + cmp.ge p7,p8 = rExp, rBigexp // Is |x| >= 2^63? } - - -{ .mii - nop.m 999 - nop.i 999 - and rint_GR_exponent = rint_GR_signexp, rint_GR_17ones ;; -} -{ .mmi - cmp.ge.unc p7,p6 = rint_GR_exponent, rint_GR_10033 - and rint_GR_rcs0 = rint_GR_rcs0_mask, rint_GR_fpsr - nop.i 999 -;; +// We must correct result if |x| >= 2^63 +{ .mfi + nop.m 0 +(p7) fma.s0 f8 = fNormX, f1, f0 // If |x| >= 2^63, result x + nop.i 0 } - -// Check to see if s0 rounding mode is round to nearest. If not then set s2 -// rounding mode to that of s0 and repeat conversions. -// Must merge the original sign for cases where the result is zero or the input -// is the largest that still has a fraction (0x1007dfffffffffff) -L(RINT_COMMON): -{ .mfb - cmp.ne p11,p0 = rint_GR_rcs0, r0 -(p6) fmerge.s RINT_SIGNED_FLOAT_INT_f8 = f8, RINT_FLOAT_INT_f8 -(p11) br.cond.spnt L(RINT_NOT_ROUND_NEAREST) // Branch if not round to nearest ;; -} { .mfi - nop.m 999 -(p6) fcmp.eq.unc.s1 p0,p8 = RINT_FLOAT_INT_f8, RINT_NORM_f8 - nop.i 999 + nop.m 0 + fcmp.eq.unc.s1 p0, p9 = f8, fNormX // Is result = x ? + nop.i 0 } { .mfi - nop.m 999 -(p7) fnorm.s0 f8 = f8 - nop.i 999 -;; + nop.m 0 +(p8) fmerge.s f8 = fNormX, f8 // Make sure sign rint(x) = sign x + nop.i 0 } +;; { .mfi - nop.m 999 -(p6) fnorm f8 = RINT_SIGNED_FLOAT_INT_f8 - nop.i 999 +(p8) and rRcs0 = rFpsr, rRcs0Mask // Get rounding mode for sf0 + nop.f 0 + nop.i 0 +} ;; + +// If |x| < 2^63 we must test for other rounding modes +{ .mfi +(p8) cmp.ne.unc p10,p0 = rRcs0, r0 // Test for other rounding modes +(p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact + nop.i 0 +} +{ .mbb + nop.m 0 +(p10) br.cond.spnt RINT_NOT_ROUND_NEAREST // Branch if not round nearest + br.ret.sptk b0 // Exit main path if round nearest } +;; + + +RINT_UNORM: +// Here if x unorm { .mfb - nop.m 999 -(p8) fmpy.s0 RINT_INEXACT = RINT_FFFF,RINT_FFFF // Dummy to set inexact - br.ret.sptk b0 -;; + getf.exp rSignexp = fNormX // Get signexp, recompute if unorm + fcmp.eq.s0 p7,p0 = f8, f0 // Dummy op to set denormal flag + br.cond.sptk RINT_COMMON // Return to main path } +;; -L(RINT_NOT_ROUND_NEAREST): -// Set rounding mode of s2 to that of s0 +RINT_NOT_ROUND_NEAREST: +// Here if not round to nearest, and |x| < 2^63 +// Set rounding mode of s2 to that of s0, and repeat the conversion using s2 { .mfi - mov rint_GR_rcs0 = r0 // Clear so we don't come back here - fsetc.s2 0x7f, 0x40 - nop.i 999 -;; + nop.m 0 + fsetc.s2 0x7f, 0x40 + nop.i 0 } +;; { .mfi - nop.m 999 - fcvt.fx.s2 RINT_INT_f8 = f8 - nop.i 999 + nop.m 0 + fcvt.fx.s2 fXInt = fNormX // Convert to int in significand + nop.i 0 +} ;; + +{ .mfi + nop.m 0 + fcvt.xf f8 = fXInt // Expected result + nop.i 0 } +;; +// Be sure sign of result = sign of input. Fixes cases where result is 0. { .mfb - nop.m 999 - fcvt.xf RINT_FLOAT_INT_f8 = RINT_INT_f8 - br.cond.sptk L(RINT_COMMON) -;; + nop.m 0 + fmerge.s f8 = fNormX, f8 + br.ret.sptk b0 // Exit main path } +;; - -.endp rintl -ASM_SIZE_DIRECTIVE(rintl) -#ifdef _LIBC -ASM_SIZE_DIRECTIVE(__rintl) -#endif +GLOBAL_IEEE754_END(rintl) -- cgit 1.4.1