From c70a4b1db0cf5e813ae24b0fa96a352399eb6edf Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 15 Feb 2014 22:07:25 -0500 Subject: ia64: relocate out of ports/ subdir --- sysdeps/ia64/fpu/s_fabsl.S | 82 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 sysdeps/ia64/fpu/s_fabsl.S (limited to 'sysdeps/ia64/fpu/s_fabsl.S') diff --git a/sysdeps/ia64/fpu/s_fabsl.S b/sysdeps/ia64/fpu/s_fabsl.S new file mode 100644 index 0000000000..3794d19a8a --- /dev/null +++ b/sysdeps/ia64/fpu/s_fabsl.S @@ -0,0 +1,82 @@ +.file "fabsl.s" + + +// Copyright (c) 2000 - 2003, Intel Corporation +// All rights reserved. +// +// Contributed 2000 by the Intel Numerics Group, Intel Corporation +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are +// met: +// +// * Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// * The name of Intel Corporation may not be used to endorse or promote +// products derived from this software without specific prior written +// permission. + +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://www.intel.com/software/products/opensource/libraries/num.htm. +// +// History +//============================================================== +// 02/02/00 Initial version +// 02/07/02 Added __libm_fabsl entry point to test in case compiler inlines +// 05/20/02 Cleaned up namespace and sf0 syntax +// 02/10/03 Reordered header: .section, .global, .proc, .align +// +// API +//============================================================== +// long double fabsl (long double x) +// +// Overview of operation +//============================================================== +// returns absolute value of x + +// floating-point registers used: 1 +// f8, input + +.section .text +.global __libm_fabsl# + +.proc __libm_fabsl# +__libm_fabsl: +.endp __libm_fabsl# + +GLOBAL_IEEE754_ENTRY(fabsl) + +// set invalid or denormal flags and take fault if +// necessary + +{ .mfi + nop.m 999 + fcmp.eq.unc.s0 p6,p7 = f8,f1 + nop.i 999 ;; +} + +{ .mfb + nop.m 999 + fmerge.s f8 = f0,f8 + br.ret.sptk b0 ;; +} + +GLOBAL_IEEE754_END(fabsl) -- cgit 1.4.1