From afdca0f2a3a18fb0dcfc334c205e0fb96e90e839 Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Fri, 5 Mar 2004 10:29:47 +0000 Subject: Update. * sysdeps/sparc/sparc64/dl-machine.h: Likewise. * sysdeps/sparc/sparc32/dl-machine.h: Likewise. * sysdeps/s390/s390-64/dl-machine.h: Likewise. * sysdeps/s390/s390-32/dl-machine.h: Likewise. * sysdeps/powerpc/powerpc64/dl-machine.h: Likewise. * sysdeps/powerpc/powerpc32/dl-machine.c: Likewise. * sysdeps/m68k/dl-machine.h: Likewise. * sysdeps/ia64/dl-machine.h: Likewise. * sysdeps/arm/dl-machine.h: Likewise. * sysdeps/alpha/dl-machine.h: Likewise. --- sysdeps/i386/fpu/feholdexcpt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'sysdeps/i386/fpu/feholdexcpt.c') diff --git a/sysdeps/i386/fpu/feholdexcpt.c b/sysdeps/i386/fpu/feholdexcpt.c index 2d6cc0d442..55096869a1 100644 --- a/sysdeps/i386/fpu/feholdexcpt.c +++ b/sysdeps/i386/fpu/feholdexcpt.c @@ -1,5 +1,5 @@ /* Store current floating-point environment and clear exceptions. - Copyright (C) 1997, 1999, 2003 Free Software Foundation, Inc. + Copyright (C) 1997, 1999, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper , 1997. @@ -36,7 +36,7 @@ feholdexcept (fenv_t *envp) __asm__ ("fldcw %0" : : "m" (*&work)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xwork; -- cgit 1.4.1