From 3f62b69af3f0f61299ac7bcbc7c3b35cbd16cf4a Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Mon, 27 Jul 1998 17:55:05 +0000 Subject: Update. 1998-07-27 17:42 Ulrich Drepper * nss/nss_files/files-parse.c (INT_FIELD): Use strtoul instead of strtol. (INT_FIELD_MAYBE_NULL): Likewise. * posix/globtest.c: Rewrite for extended test suite. * posix/globtest.sh: More tests. Patch by Brian Wellington . * stdlib/strtol.c: Don't redefine LONG_MAX, LONG_MIN, and ULONG_MAX. Use new macro. * sysdeps/generic/readv.c: Correct return type. * sysdeps/generic/writev.c: Likewise. 1998-07-24 Gordon Matzigkeit * argp/argp-help.c (_GNU_SOURCE): Define, to suck in program_invocation_name when compiling outside of glibc. 1998-07-26 Philip Blundell * sysdeps/unix/sysv/linux/arm/siglist.c: New file; ARM tools don't like `@' in .type directives. * sysdeps/libm-ieee754/e_expf.c (__ieee754_expf): Check whether FE_TONEAREST exists for this platform before using it. * sysdeps/libm-ieee754/e_exp.c (__ieee754_exp): Likewise. * sysdeps/arm/dl-machine.h (elf_machine_rel): Delete redundant debugging code. Correct handling of PC24 relocs. * elf/Makefile (ld-map): Only define if versioning is in use. * sysdeps/arm/fpu_control.h: Move to ... * sysdeps/arm/fpu/fpu_control.h: ... here. * sysdeps/generic/fpu_control.h: Made usable as a dummy implementation. * sysdeps/unix/sysv/linux/arm/brk.c: New file. * sysdeps/arm/machine-gmon.h: Improved profiling for ARM. * sysdeps/arm/sysdep.h (CALL_MCOUNT): Replace stub with real implementation. * sysdeps/unix/sysv/linux/arm/clone.S: Likewise. Based on patch from Scott Bambrough and Pat Beirne. * shlib-versions: Add appropriate definitions for ARM machines. * README.template: Mention that Linux/ARM with ELF works now. 1998-07-18 Andreas Schwab * Makerules: Generate compilation rules for all object suffixes, not only those currently selected, for sources in the current or object directory. 1998-07-24 Andreas Schwab * posix/fnmatch.c (fnmatch): Allow `/' in character class. Don't match `/' in filename by a character class if requested. * posix/testfnm.c: Rewritten. * posix/testfnm.args: Removed. 1998-07-25 Andreas Schwab * posix/annexc.c (limits_syms): Add missing symbols. (stdarg_syms): Move va_list to `maybe' list. (stdio_syms): Add FOPEN_MAX. --- sysdeps/arm/dl-machine.h | 36 +++-------------- sysdeps/arm/fpu/fpu_control.h | 93 +++++++++++++++++++++++++++++++++++++++++++ sysdeps/arm/fpu_control.h | 93 ------------------------------------------- sysdeps/arm/machine-gmon.h | 42 +++++++++++-------- sysdeps/arm/sysdep.h | 8 ++-- 5 files changed, 129 insertions(+), 143 deletions(-) create mode 100644 sysdeps/arm/fpu/fpu_control.h delete mode 100644 sysdeps/arm/fpu_control.h (limited to 'sysdeps/arm') diff --git a/sysdeps/arm/dl-machine.h b/sysdeps/arm/dl-machine.h index 7612285907..912f7863fb 100644 --- a/sysdeps/arm/dl-machine.h +++ b/sysdeps/arm/dl-machine.h @@ -398,35 +398,6 @@ elf_machine_rel (struct link_map *map, const Elf32_Rel *reloc, break; case R_ARM_GLOB_DAT: case R_ARM_JUMP_SLOT: - -#if 0 -#define _HEX(i) for (j=28; j>=0; j-=4) b[7-j/4]="0123456789abcdef"[((int)i>>j)&15]; -{ -char b[10]; -int j; -_HEX(map->l_addr); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -_HEX(sym->st_size); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -_HEX(&sym->st_value); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -_HEX(sym->st_value); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -_HEX(sym); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -_HEX(reloc_addr); -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #9; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -b[0]=' '; b[1]='\n'; -__asm__ (" mov r0, #2; mov r1, %0; mov r2, #2; swi 0x00900004; " - : : "r"(b) : "r0", "r1", "r2" ); -} -#endif *reloc_addr = value; break; case R_ARM_ABS32: @@ -451,7 +422,12 @@ __asm__ (" mov r0, #2; mov r1, %0; mov r2, #2; swi 0x00900004; " break; } case R_ARM_PC24: - *reloc_addr += (value - (Elf32_Addr) reloc_addr); + { + long int disp = (value - (Elf32_Addr) reloc_addr) / 4; + if ((disp >= (1<<24)) || (disp <= -(1<<24))) + assert (! "address out of range for PC24 reloc"); + *reloc_addr += disp; + } break; default: assert (! "unexpected dynamic reloc type"); diff --git a/sysdeps/arm/fpu/fpu_control.h b/sysdeps/arm/fpu/fpu_control.h new file mode 100644 index 0000000000..8a2d338c49 --- /dev/null +++ b/sysdeps/arm/fpu/fpu_control.h @@ -0,0 +1,93 @@ +/* FPU control word definitions. ARM version. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If not, + write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef _FPU_CONTROL_H +#define _FPU_CONTROL_H + +/* We have a slight terminology confusion here. On the ARM, the register + * we're interested in is actually the FPU status word - the FPU control + * word is something different (which is implementation-defined and only + * accessible from supervisor mode.) + * + * The FPSR looks like this: + * + * 31-24 23-16 15-8 7-0 + * | system ID | trap enable | system control | exception flags | + * + * We ignore the system ID bits; for interest's sake they are: + * + * 0000 "old" FPE + * 1000 FPPC hardware + * 0001 FPE 400 + * 1001 FPA hardware + * + * The trap enable and exception flags are both structured like this: + * + * 7 - 5 4 3 2 1 0 + * | reserved | INX | UFL | OFL | DVZ | IVO | + * + * where a `1' bit in the enable byte means that the trap can occur, and + * a `1' bit in the flags byte means the exception has occurred. + * + * The exceptions are: + * + * IVO - invalid operation + * DVZ - divide by zero + * OFL - overflow + * UFL - underflow + * INX - inexact (do not use; implementations differ) + * + * The system control byte looks like this: + * + * 7-5 4 3 2 1 0 + * | reserved | AC | EP | SO | NE | ND | + * + * where the bits mean + * + * ND - no denormalised numbers (force them all to zero) + * NE - enable NaN exceptions + * SO - synchronous operation + * EP - use expanded packed-decimal format + * AC - use alternate definition for C flag on compare operations + */ + +#define _FPU_RESERVED 0xfff0e0f0 /* These bits are reserved. */ + +/* The fdlibm code requires no interrupts for exceptions. Don't + change the rounding mode, it would break long double I/O! */ +#define _FPU_DEFAULT 0x00000000 /* Default value. */ + +/* Type of the control word. */ +typedef unsigned int fpu_control_t; + +/* Macros for accessing the hardware control word. */ +#define _FPU_GETCW(cw) __asm__ ("rfs %0" : "=r" (cw)) +#define _FPU_SETCW(cw) __asm__ ("wfs %0" : : "r" (cw)) + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +__BEGIN_DECLS + +/* Called at startup. It can be used to manipulate fpu control register. */ +extern void __setfpucw __P ((fpu_control_t)); + +__END_DECLS + +#endif /* _FPU_CONTROL_H */ diff --git a/sysdeps/arm/fpu_control.h b/sysdeps/arm/fpu_control.h deleted file mode 100644 index 8a2d338c49..0000000000 --- a/sysdeps/arm/fpu_control.h +++ /dev/null @@ -1,93 +0,0 @@ -/* FPU control word definitions. ARM version. - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If not, - write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ - -#ifndef _FPU_CONTROL_H -#define _FPU_CONTROL_H - -/* We have a slight terminology confusion here. On the ARM, the register - * we're interested in is actually the FPU status word - the FPU control - * word is something different (which is implementation-defined and only - * accessible from supervisor mode.) - * - * The FPSR looks like this: - * - * 31-24 23-16 15-8 7-0 - * | system ID | trap enable | system control | exception flags | - * - * We ignore the system ID bits; for interest's sake they are: - * - * 0000 "old" FPE - * 1000 FPPC hardware - * 0001 FPE 400 - * 1001 FPA hardware - * - * The trap enable and exception flags are both structured like this: - * - * 7 - 5 4 3 2 1 0 - * | reserved | INX | UFL | OFL | DVZ | IVO | - * - * where a `1' bit in the enable byte means that the trap can occur, and - * a `1' bit in the flags byte means the exception has occurred. - * - * The exceptions are: - * - * IVO - invalid operation - * DVZ - divide by zero - * OFL - overflow - * UFL - underflow - * INX - inexact (do not use; implementations differ) - * - * The system control byte looks like this: - * - * 7-5 4 3 2 1 0 - * | reserved | AC | EP | SO | NE | ND | - * - * where the bits mean - * - * ND - no denormalised numbers (force them all to zero) - * NE - enable NaN exceptions - * SO - synchronous operation - * EP - use expanded packed-decimal format - * AC - use alternate definition for C flag on compare operations - */ - -#define _FPU_RESERVED 0xfff0e0f0 /* These bits are reserved. */ - -/* The fdlibm code requires no interrupts for exceptions. Don't - change the rounding mode, it would break long double I/O! */ -#define _FPU_DEFAULT 0x00000000 /* Default value. */ - -/* Type of the control word. */ -typedef unsigned int fpu_control_t; - -/* Macros for accessing the hardware control word. */ -#define _FPU_GETCW(cw) __asm__ ("rfs %0" : "=r" (cw)) -#define _FPU_SETCW(cw) __asm__ ("wfs %0" : : "r" (cw)) - -/* Default control word set at startup. */ -extern fpu_control_t __fpu_control; - -__BEGIN_DECLS - -/* Called at startup. It can be used to manipulate fpu control register. */ -extern void __setfpucw __P ((fpu_control_t)); - -__END_DECLS - -#endif /* _FPU_CONTROL_H */ diff --git a/sysdeps/arm/machine-gmon.h b/sysdeps/arm/machine-gmon.h index 27643df884..96b4c13c72 100644 --- a/sysdeps/arm/machine-gmon.h +++ b/sysdeps/arm/machine-gmon.h @@ -1,5 +1,5 @@ /* Machine-dependent definitions for profiling support. ARM version. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -37,19 +37,29 @@ static void mcount_internal (u_long frompc, u_long selfpc); #define _MCOUNT_DECL(frompc, selfpc) \ static void mcount_internal (u_long frompc, u_long selfpc) -#define MCOUNT \ -void _mcount (void) \ -{ \ - register unsigned long int frompc, selfpc; \ - __asm__("movs fp, fp; " \ - "moveq %0, $0; " \ - "ldrne %0, [fp, $-4]; " \ - "ldrne %1, [fp, $-12]; " \ - "movnes %1, %1; " \ - "ldrne %1, [%1, $-4]; " \ - : "=g" (selfpc), "=g" (frompc) \ - : : "cc" \ - ); \ - if (selfpc) \ - mcount_internal(frompc, selfpc); \ +/* This macro/func MUST save r0, r1 because the compiler inserts + blind calls to _mount(), ignoring the fact that _mcount may + clobber registers; therefore, _mcount may NOT clobber registers */ +/* if (this_fp!=0) { + r0 = this_lr + r1 = this_fp + r1 = [r1-4] which is caller's fp + if (r1!=0) + r1 = caller's lr + call mcount_internal(this_lr, caller's_lr) + } +*/ +#define MCOUNT \ +void _mcount (void) \ +{ \ + __asm__("stmdb sp!, {r0, r1, r2, r3};" \ + "movs fp, fp;" \ + "moveq r0, #0;" \ + "ldrne r0, [fp, $-4];" \ + "ldrne r1, [fp, $-12];" \ + "movnes r1, r1;" \ + "ldrne r1, [r1, $-4];" \ + "movs r1, r1;" \ + "blne mcount_internal;" \ + "ldmia sp!, {r0, r1, r2, r3}"); \ } diff --git a/sysdeps/arm/sysdep.h b/sysdeps/arm/sysdep.h index 4fc90aeed0..13d34c741b 100644 --- a/sysdeps/arm/sysdep.h +++ b/sysdeps/arm/sysdep.h @@ -73,10 +73,10 @@ /* If compiled for profiling, call `mcount' at the start of each function. */ #ifdef PROF -/* The mcount code relies on a normal frame pointer being on the stack - to locate our caller, so push one just for its benefit. */ -#define CALL_MCOUNT \ -#error Profiling not supported. +#define CALL_MCOUNT \ + str lr,[sp, #-4]! \ + bl PLTJMP(mcount) \ + ldr lr, [sp], #4 #else #define CALL_MCOUNT /* Do nothing. */ #endif -- cgit 1.4.1